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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM3703CUS датащи(PDF) 114 Page - Texas Instruments |
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AM3703CUS датащи(HTML) 114 Page - Texas Instruments |
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114 / 280 page  AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com 2.5.9 System and Miscellaneous Terminals Note: For more information, see the Power, Reset, and Clock Management / PRCM Environment section of the AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4). Table 2-26. System and Miscellaneous Signals Description(1) SIGNAL NAME DESCRIPTION [2] TYPE [3] BALL BALL TOP BALL BALL TOP BALL [1] BOTTOM (CBP Pkg.) BOTTOM (CBC Pkg.) BOTTOM (CBP Pkg.) (2)[5] (CBC Pkg.) (2)[5] (CUS Pkg.) [4] [4] [4] sys_32k 32-kHz clock input I AE25 NA AE20 NA AA16 sys_xtalin Main input clock. Oscillator input or LVCMOS at AI-I AE17 NA AF19 NA AD15 19.2, 13, or 12 MHz. sys_xtalout Output of oscillator AO AF17 NA AF20 NA AD14 sys_altclk Alternate clock source selectable for GPTIMERs I J25 NA J23 NA A24 (maximum 54 MHz), USB (48 MHz), or NTSC/PAL (54 MHz) sys_clkreq Request from device for system clock (open IO AF25 NA W15 NA Y13 source type) sys_clkout1 Configurable output clock1 O AG25 NA AE14 NA Y7 sys_clkout2 Configurable output clock2 O AE22 NA W11 NA AA6 sys_boot0 Boot configuration mode bit 0 I AH26 NA F3 NA AB12 sys_boot1 Boot configuration mode bit 1 I AG26 NA D3 NA AC16 sys_boot2 Boot configuration mode bit 2 I AE14 NA C3 NA AD17 sys_boot3 Boot configuration mode bit 3 I AF18 NA E3 NA AD18 sys_boot4 Boot configuration mode bit 4 I AF19 NA E4 NA AC17 sys_boot5 Boot configuration mode bit 5 I AE21 NA G3 NA AB16 sys_boot6 Boot configuration mode bit 6 I AF21 NA D4 NA AA15 sys_nrespwron Power On Reset I AH25 NA V13 NA AA10 sys_nreswarm Warm Boot Reset (open drain output) IOD AF24 NA AD7 AA5 Y10 sys_nirq External FIQ input I AF26 NA V16 NA W16 sys_nvmode1 Indicates the voltage mode O AD26 NA AD15 NA Y16 sys_nvmode2 Indicates the voltage mode O AE26 NA W16 NA Y15 sys_off_mode Indicates the voltage mode O AF22 NA V12 NA AD23 sys_ndmareq0 External A request 0 (system expansion). Level I U8 NA B6 NA D2 (active low) or edge (falling) selectable. sys_ndmareq1 External A request 1 (system expansion). Level I T8 / J8 NA B4 / C6 NA F4 / C2 (active low) or edge (falling) selectable. sys_ndmareq2 External A request 2 (system expansion). Level I L3 / R8 NA D1 / C4 NA H2 / G5 (active low) or edge (falling) selectable. sys_ndmareq3 External A request 3 (system expansion). Level I K3 / P8 NA D2 / B5 NA G2 / F3 (active low) or edge (falling) selectable. (1) NA in this table stands for "Not applicable". (2) For a list of pins not supported on a particular package, see Table 2-4. Table 2-27. CBC Package Feed-Through Balls JEDEC 14x14mm, 0.65mm, JEDEC DESCRIPTION (1) BALL TOP BALL BOTTOM FEED-THROUGH BALL 152ball NAME NC No Connect A1 A1 pop_a1_a1 d-vdd DDR Supply J1 L1 pop_j1_l1 NC No Connect AA1 AF1 NC f-vdd Flash Supply N2 T2 pop_n2_t2 f-vdd Flash Supply T2 Y2 pop_t2_y2 NC No Connect W2 AE2 pop_w2_ae2 NC No Connect Y2 AF4 pop_y2_af4 f-vdd Flash Supply AA6 AF5 pop_aa6_af5 f-vdd Flash Supply Y7 AF8 pop_y7_af8 114 TERMINAL DESCRIPTION Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3715 AM3703 |
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