| поискавой системы для электроныых деталей |
|
LTC3404MPMS8 датащи(PDF) 7 Page - Linear Technology |
|
|
|||||||||||||||||||||||||||||
LTC3404MPMS8 датащи(HTML) 7 Page - Linear Technology |
|
7 / 16 page ![]() 7 LTC3404 3404fb + – + – + – + – OVDET EA IRCMP + – ICOMP 8 7 3 1 RUN PLL LPF VCO X Y Y = “0” ONLY WHEN X IS A CONSTANT “1” BURST DEFEAT SLOPE COMP OSC SYNC/MODE 0.6V FREQ SHIFT VREF 0.8V 0.85V gm = 0.5m 0.8V REF SHUTDOWN 0.55V 0.8V SLEEP VIN VIN VIN VIN ITH SLEEP VFB EN BURST VIN 2 S R RS LATCH SWITCHING LOGIC AND BLANKING CIRCUIT ANTI- SHOOT- THRU Q Q 6 Ω 6 SW 5 GND 3404 BD 4 P-CH P-CH N-CH FU CTIO AL DIAGRA OPERATIO Main Control Loop The LTC3404 uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOS- FET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each clock cycle when the oscillator sets the RS latch, and turned off when the current com- parator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch is controlled by the voltage on the ITH pin, which is the output of error amplifier EA. The VFB pin, described in the Pin Functions section, allows EA to receive an output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage, VFB, relative to the 0.8V internal reference, which in turn, causes the ITH voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. Comparator OVDET guards against transient overshoots >6.25% by turning the main switch off and keeping it off until the fault is removed. Burst Mode Operation The LTC3404 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Mode operation, simply tie the SYNC/MODE pin to VIN or connect it to a logic high (VSYNC/MODE> 1.5V). To disable Burst Mode operation and enable PWM pulse skipping mode, connect the SYNC/ MODE pin to GND. In this mode, the efficiency is lower at light loads, but becomes comparable to Burst Mode operation when the output load exceeds 50mA. The ad- vantage of pulse skipping mode is lower output ripple and less interference to audio circuitry. |
|
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |