STM32L151RDT6 datasheet(96/140 Pages) STMICROELECTRONICS

96 / 140 page

Electrical characteristics

STM32L151xD STM32L152xD

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Doc ID 022027 Rev 6

Static latch-up

Two complementary static tests are required on six parts to assess the latch-up

performance:

●

A supply overvoltage is applied to each power supply pin

●

A current injection is applied to each input, output and configurable I/O pin

These tests are compliant with EIA/JESD 78A IC latch-up standard.

6.3.12

I/O current injection characteristics

As a general rule, current injection to the I/O pins, due to external voltage below VSS or

above VDD (for standard pins) should be avoided during normal product operation. However,

in order to give an indication of the robustness of the microcontroller in cases when

abnormal injection accidentally happens, susceptibility tests are performed on a sample

basis during device characterization.

Functional susceptibility to I/O current injection

While a simple application is executed on the device, the device is stressed by injecting

current into the I/O pins programmed in floating input mode. While current is injected into the

I/O pin, one at a time, the device is checked for functional failures.

The failure is indicated by an out of range parameter: ADC error, out of spec current

injection on adjacent pins or other functional failure (for example reset, oscillator frequency

deviation, LCD levels, etc.).

The test results are given in the following table.

Table 48.

Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latch-up class

TA = +105 °C conforming to JESD78A

II level A

Table 49.

I/O current injection susceptibility

Symbol

Description

Functional susceptibility

Unit

Negative

injection

Positive

injection

IINJ

Injected current on true open-drain pins

-5

Injected current on all 5 V tolerant (FT) pins

-5

Injected current on any other pin

-5

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