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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC18F1220E/SOSQTP датащи(PDF) 86 Page - Microchip Technology |
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PIC18F1220E/SOSQTP датащи(HTML) 86 Page - Microchip Technology |
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86 / 308 page  PIC18F1220/1320 DS39605F-page 84 © 2007 Microchip Technology Inc. 9.5 RCON Register The RCON register contains bits used to determine the cause of the last Reset or wake-up from a low-power mode. RCON also contains the bit that enables interrupt priorities (IPEN). REGISTER 9-10: RCON REGISTER R/W-0 U-0 U-0 R/W-1 R-1 R-1 R/W-0 R/W-0 IPEN — —RI TO PD POR BOR bit 7 bit 0 bit 7 IPEN: Interrupt Priority Enable bit 1 = Enable priority levels on interrupts 0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode) bit 6-5 Unimplemented: Read as ‘0’ bit 4 RI: RESET Instruction Flag bit For details of bit operation, see Register 5-3. bit 3 TO: Watchdog Time-out Flag bit For details of bit operation, see Register 5-3. bit 2 PD: Power-down Detection Flag bit For details of bit operation, see Register 5-3. bit 1 POR: Power-on Reset Status bit For details of bit operation, see Register 5-3. bit 0 BOR: Brown-out Reset Status bit For details of bit operation, see Register 5-3. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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