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82563EB датащи(PDF) 16 Page - Intel Corporation |
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82563EB датащи(HTML) 16 Page - Intel Corporation |
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16 / 52 page ![]() 82563EB/82564EB Gigabit Platform LAN Connect Networking Silicon 10 3.9 Reserved Signals 3.10 Voltage Control Pins Table 8. Test Signals Signal Name Pin Type Sub- Type Description RESERVED_NC 4 5 6 8 9 10 13 14 15 17 26 49 52 53 98 NC NC Reserved No Connect This pin should be left disconnected in normal operation. Connecting any of these pins may cause adverse effects and will not be supported. RESERVED_PD 82 I (T) TTL Reserved, Pull-down This signal used in the XOR chain. It should be pulled to VSS via a 1 to10 K Ω resistor. Table 9. Voltage Control Pins Signal Name Pin Type Sub- Type Description CTRL_18 25 A A 1.9V LVR Power Output Reference Voltage control for an external 1.9V PNP transistor in order to produce a linearly-regulated supply. If the 1.9V internal voltage regulator control circuit is not used, connect the CTRL_18 pin to VSS through a 10 K Ω resistor. CTRL_12 23 A A 1.2V LVR Power Output Reference Voltage control for an external 1.2V PNP transistor in order to produce a linearly-regulated supply. If the 1.2V internal voltage regulator control circuit is not used, connect the CTRL_12 pin to VSS through a 10 K Ω resistor. |
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