ADMCF340 datasheet(20/40 Pages) AD

20 / 40 page

REV. 0

ADMCF340

–20–

ICONST_TRIM

REG <2:0>

ADC1

ADC2

ADC3

ADCAUX

COMP

VREF

VAUX3 (V)

VAUX0

VAUX0 (V)

VAUX1

VAUX1 (V)

VAUX2

VAUX2 (V)

VAUX4

VAUX4 (V)

VAUX5

VAUX5 (V)

VAUX6

VAUX6 (V)

VAUX7

VAUX7 (V)

ICONST

CURRENT

VOLTAGE

CURRENT

VOLTAGE

CURRENT

VOLTAGE

8-1

MULTIPLEXER

MODECTRL REG <0..1>

COMP

ICONST

FILTER

VAUX

PWMSYNC (CONVST)

MODECTRL

REG <07>

CLK

CAPACITOR

RESET

CAPACITOR

EXTERNALCHARGING

12-BIT

ADC

TIMER

BLOCK

ADC

REGISTERS

PWMTRIP

CHANNEL1

CHANNEL2

CHANNEL3

MODECTRL REG

<09..10..11>

Figure 11. ADC Overview

Single Slope ADC Operations

Comparing each ADC input to a reference ramp voltage and

timing the comparison of the two signals performs the conversion

process. The actual conversion point is the time point intersection

of the input voltage and the ramp voltage (VC) as shown in

Figure 12. This time is converted to counts by the 12-bit ADC

Timer Block and is stored in the ADC registers. The ramp

voltage used to perform the conversion is generated by driving a

fixed current into an off-chip capacitor, where the capacitor

voltage is:

VI C

() ×

Following reset, VC = 0 at t = 0. This reset and the start of the

conversion process are initiated by the PWMSYNC pulse, as

shown in Figure 12. The width of the PWMSYNC pulse is

controlled by the PWMSYNCWT Register and should be

programmed according to Figure 12 to ensure complete resetting.

In order to compensate for IC process manufacturing tolerances

(and to adjust for capacitor tolerances), the current source of the

ADMCF340 is software programmable. The software setting of the

magnitude of the ICONST current generator is accomplished by

selecting one of eight steps over approximately 20% current range.

Table VI. ADC Auxiliary Channel Selection

MODECTRL(5)

MODECTRL(1)

MODECTRL(0)

Select

ADCMUX

ADCMUX1

ADCMUX0

VAUX0

VAUX1

VAUX2

VAUX3 Calibration (VREF)0

VAUX4

VAUX5

VAUX6

VAUX7

Table VII. Port A Multiplexing

PORTA Pin

First Alternate Function (Peripheral)

Second Alternate Function (Peripheral)

PORTA8

AUX0 (Auxiliary PWM Output)

CLKOUT (System CLOCK)

PORTA7

AUX1 (Auxiliary PWM Output)

PWMSYNC (PWM)

PORTA6

DR1 (Data Receive SPORT1)

None

PORTA5

FL1 (Flag Out SPORT1)

DT1 (Data Transmit SPORT1)

PORTA4

SCLK1 (Serial Clock SPORT1)

SCLK0 (Serial Clock SPORT0)

PORTA3

TFS0 (Transmit Frame Sync SPORT0)

None

PORTA2

RFS0 (Receive Frame Sync SPORT0)

None

PORTA1

DT0 (Data Transmit SPORT0)

None

PORTA0

DR0 (Data Receive SPORT0)

None

ADMCF340 датащи(PDF) 20 Page - Analog Devices

ADMCF340 датащи(HTML) 20 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

датащи скачать

ссылки URL