AD9772EB datasheet(16/32 Pages) AD

16 / 32 page

REV. A

AD9772A

–16–

DAC OPERATION

The 14-bit DAC along with the 1.2 V reference and reference

control amplifier is shown in Figure 14. The DAC consists of a

large PMOS current source array capable of providing up to

20 mA of full-scale current, IOUTFS. The array is divided into

thirty-one equal currents that make up the five most significant

bits (MSBs). The next four bits, or middle bits, consist of 15

equal current sources whose values are 1/16th of an MSB

current source. The remaining LSBs are binary weighted frac-

tions of the middle-bits’ current sources. All of these current

sources are switched to one or the other of two output nodes

(i.e., IOUTA or IOUTB) via PMOS differential current switches.

Implementing the middle and lower bits with current sources,

instead of an R-2R ladder, enhances its dynamic performance

for multitone or low amplitude signals and helps maintain the

DAC’s high output impedance.

REFIO

FSADJ

250pF

REFLO

AVDD

AD9772A

RSET

0.1 F

ACOM

CURRENT

SOURCE

ARRAY

IOUTA

IOUTB

INTERPOLATED

DIGITAL DATA

RLOAD

VDIFF = VOUTA – VOUTB

IOUTA

IOUTB

SEGMENTED

SWITCHES

LSB

SWITCHES

+1.2V REF

2.7V TO 3.6V

IREF

Figure 14. Block Diagram of Internal DAC, 1.2 V

Reference, and Reference Control Circuits

The full-scale output current is regulated by the reference control

amplifier and can be set from 2 mA to 20 mA via an external

resistor, RSET, as shown in Figure 14. RSET, in combination

with both the reference control amplifier and voltage reference,

REFIO, sets the reference current, IREF, which is mirrored to

the segmented current sources with the proper scaling factor.

The full-scale current, IOUTFS, is exactly thirty-two times the

value of IREF.

DAC TRANSFER FUNCTION

The AD9772A provides complementary current outputs, IOUTA

and IOUTB. IOUTA will provide a near full-scale current output,

IOUTFS, when all bits are high (i.e., DAC CODE = 16383) while

IOUTB, the complementary output, provides no current. The

current output appearing at IOUTA and IOUTB is a function of

both the input code and IOUTFS and can be expressed as:

IOUTA = (DAC CODE/16384)

× IOUTFS

(1)

IOUTB = (16383 – DAC CODE)/16384

× IOUTFS

(2)

where DAC CODE = 0 to 16383 (i.e., Decimal Representation).

As previously mentioned, IOUTFS is a function of the reference

current IREF, which is nominally set by a reference voltage

VREFIO, and external resistor, RSET. It can be expressed as:

IOUTFS = 32

× IREF

(3)

where

IREF = VREFIO/RSET

(4)

The two current outputs will typically drive a resistive load

directly or via a transformer. If dc coupling is required, IOUTA

and IOUTB should be directly connected to matching resistive

loads, RLOAD, that are tied to analog common, ACOM. Note

that RLOAD may represent the equivalent load resistance seen by

IOUTA or IOUTB as would be the case in a doubly terminated 50

Ω

or 75

Ω cable. The single-ended voltage output appearing at the

IOUTA and IOUTB nodes is simply:

VOUTA = IOUTA

× R

LOAD

(5)

VOUTB = IOUTB

× R

LOAD

(6)

Note that the full-scale value of VOUTA and VOUTB should not

exceed the specified output compliance range of 1.25 V to pre-

vent signal compression. To maintain optimum distortion and

linearity performance, the maximum voltages at VOUTA and

VOUTB should not exceed

±500 mV p-p.

The differential voltage, VDIFF, appearing across IOUTA and

IOUTB, is:

VDIFF = (IOUTA – IOUTB)

× RLOAD

(7)

Substituting the values of IOUTA, IOUTB and IREF; VDIFF can be

expressed as:

VDIFF = [(2 DAC CODE – 16383)/16384]

(32 RLOAD/RSET)

× VREFIO

(8)

The last two equations highlight some of the advantages of

operating the AD9772A differentially. First, the differential

operation will help cancel common-mode error sources such as

noise, distortion and dc offsets associated with IOUTA and IOUTB.

Second, the differential code-dependent current and subsequent

voltage, VDIFF, is twice the value of the single-ended voltage

output (i.e., VOUTA or VOUTB), thus providing twice the signal

power to the load.

Note that the gain drift temperature performance for a single-

ended (VOUTA and VOUTB) or differential output (VDIFF) of the

AD9772A can be enhanced by selecting temperature tracking

resistors for RLOAD and RSET due to their ratiometric relation-

ship as shown in Equation 8.

REFERENCE OPERATION

The AD9772A contains an internal 1.20 V bandgap reference

that can easily be disabled and overridden by an external

reference. REFIO serves as either an output or input, depending

on whether the internal or external reference is selected. If

REFLO is tied to ACOM, as shown in Figure 15, the internal

reference is activated, and REFIO provides a 1.20 V output. In

this case, the internal reference must be compensated externally

with a ceramic chip capacitor of 0.1

µF or greater from REFIO

to REFLO. If any additional loading is required, REFIO should

be buffered with an external amplifier having an input bias cur-

rent less than 100 nA.

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