поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

AD9772EB датащи(PDF) 8 Page - Analog Devices

номер детали AD9772EB
подробное описание детали  14-Bit, 160 MSPS TxDAC with 2x Interpolation Filter
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9772EB датащи(HTML) 8 Page - Analog Devices

Back Button AD9772EB Datasheet HTML 4Page - Analog Devices AD9772EB Datasheet HTML 5Page - Analog Devices AD9772EB Datasheet HTML 6Page - Analog Devices AD9772EB Datasheet HTML 7Page - Analog Devices AD9772EB Datasheet HTML 8Page - Analog Devices AD9772EB Datasheet HTML 9Page - Analog Devices AD9772EB Datasheet HTML 10Page - Analog Devices AD9772EB Datasheet HTML 11Page - Analog Devices AD9772EB Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 32 page
background image
REV. A
AD9772A
–8–
DEFINITIONS OF SPECIFICATIONS
Linearity Error (Also Called Integral Nonlinearity or INL)
Linearity error is defined as the maximum deviation of the actual
analog output from the ideal output, determined by a straight
line drawn from zero to full scale.
Differential Nonlinearity (or DNL)
DNL is the measure of the variation in analog value, normalized
to full scale, associated with a 1 LSB change in digital input code.
Monotonicity
A D/A converter is monotonic if the output either increases or
remains constant as the digital input increases.
Offset Error
The deviation of the output current from the ideal of zero is
called offset error. For IOUTA, 0 mA output is expected when the
inputs are all 0s. For IOUTB, 0 mA output is expected when all
inputs are set to 1s.
Gain Error
The difference between the actual and ideal output span. The
actual span is determined by the output when all inputs are set
to 1s, minus the output when all inputs are set to 0s.
Output Compliance Range
The range of allowable voltage at the output of a current-output
DAC. Operation beyond the maximum compliance limits may
cause either output stage saturation or breakdown, resulting in
nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (25
°C) value to the value at either T
MIN or TMAX. For
offset and gain drift, the drift is reported in ppm of full-scale
range (FSR) per
°C. For reference drift, the drift is reported in
ppm per
°C.
Power Supply Rejection
The maximum change in the full-scale output as the supplies
are varied from minimum to maximum specified voltages.
Settling Time
The time required for the output to reach and remain within a
specified error band about its final value, measured from the
start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in pV-s.
Spurious-Free Dynamic Range
The difference, in dB, between the rms amplitude of the output
signal and the peak spurious signal over the specified bandwidth.
Total Harmonic Distortion
THD is the ratio of the rms sum of the first six harmonic com-
ponents to the rms value of the measured fundamental. It is
expressed as a percentage or in decibels (dB).
Signal-to-Noise Ratio (SNR)
S/N is the ratio of the rms value of the measured output signal
to the rms sum of all other spectral components below the
Nyquist frequency, excluding the first six harmonics and dc.
The value for SNR is expressed in decibels.
Passband
Frequency band in which any input applied therein passes
unattenuated to the DAC output.
Stopband Rejection
The amount of attenuation of a frequency outside the passband
applied to the DAC, relative to a full-scale signal applied at the
DAC input within the passband.
Group Delay
Number of input clocks between an impulse applied at the
device input and peak DAC output current.
Impulse Response
Response of the device to an impulse applied to the input.
Adjacent Channel Power Ratio (or ACPR)
A ratio in dBc between the measured power within a channel
relative to its adjacent channel.
PLLCLOCK
MULTIPLIER
EDGE-
TRIGGERED
LATCHES
2
FIR
INTERPOLATION
FILTER
AD9772A
3.3V
3.3V
FROM HP8644A
SIGNAL GENERATOR
3.3V
CLKVDD
CLKCOM
CLK+
1
FILTER
CONTROL
MUX
CONTROL
PLLCOM
LPF
PLLVDD
IOUTA
IOUTB
REFIO
FSADJ
REFLO
AVDD
ACOM
DVDD
DCOM
SLEEP
ZERO
STUFF
MUX
14-BIT DAC
100
MINI-CIRCUITS
T1–1T
20pF
50
50
20pF
1.91k
0.1 F
+1.2V REFERENCE
AND CONTROL AMP
AWG2021
OR
DG2020
DIGITAL
DATA
EXT.
CLOCK
HP8130
PULSE GENERATOR
CH1
CH2
EXT. INPUT
2 /4
CLK–
1k
1k
1 /2
CLOCK DISTRIBUTION
AND MODE SELECT
TO FSEA30
SPECTRUM
ANALYZER
Figure 3. Basic AC Characterization Test Setup



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com