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PCAL9535APW датащи(PDF) 34 Page - NXP Semiconductors |
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PCAL9535APW датащи(HTML) 34 Page - NXP Semiconductors |
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34 / 46 page ![]() PCAL9535A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 — 28 September 2012 34 of 46 NXP Semiconductors PCAL9535A Low-voltage 16-bit I2C-bus I/O port with interrupt and Agile I/O a. Interrupt load configuration b. Voltage waveforms CL includes probe and jig capacitance. All inputs are supplied by generators having the following characteristics: PRR 10 MHz; Z o =50 ; tr/tf 30 ns. All parameters and waveforms are not applicable to all devices. Fig 30. Interrupt load circuit and voltage waveforms 002aah069 DUT CL = 100 pF RL = 4.7 kΩ INT VDD 1 0 0 A2 A1 A0 1 A S0 slave address START condition R/W acknowledge from slave 002aah256 8 bits (one data byte) from port A acknowledge from slave SDA 1 no acknowledge from master data into port data from port DATA 1 DATA 2 INT DATA 2 DATA 1 P STOP condition tv(INT) trst(INT) tsu(D) 12345678 SCL 9 ADDRESS trst(INT) A A View A - A INT Pn tv(INT) 0.5 × VDD 0.5 × VDD View B - B SCL 0.5 × VDD INT R/W A trst(INT) 0.3 × VDD 0.7 × VDD B B |
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