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41594B датащи(PDF) 204 Page - Microchip Technology |
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41594B датащи(HTML) 204 Page - Microchip Technology |
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204 / 372 page ![]() PIC12LF1840T48A DS41594B-page 204 Preliminary 2011-2012 Microchip Technology Inc. 24.4.7 ALTERNATE PIN LOCATIONS This module incorporates I/O pins that can be moved to other locations with the use of the alternate pin function register, APFCON. To determine which pins can be moved and what their default locations are upon a Reset, see Section 12.1 “Alternate Pin Function” for more information. TABLE 24-9: SUMMARY OF REGISTERS ASSOCIATED WITH ENHANCED PWM Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page APFCON RXDTSEL SDOSEL SSSEL — T1GSEL TXCKSEL P1BSEL CCP1SEL 110 CCP1CON P1M<1:0> DC1B<1:0> CCP1M<3:0> 205 CCP1AS CCP1ASE CCP1AS<2:0> PSS1AC<1:0> PSS1BD<1:0> 206 INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 83 PIE1 TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 84 PIR1 TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 86 PR2 Timer2 Period Register 173* PSTR1CON — — — STR1SYNC Reserved Reserved STR1B STR1A 207 PWM1CON P1RSEN P1DC<6:0> 207 T2CON — T2OUTPS<3:0> TMR2ON T2CKPS<1:0> 175 TMR2 Timer2 Module Register 173 TRISA — — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 113 Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM. * Page provides register information. |
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