41594B datasheet(42/372 Pages) MICROCHIP

42 / 372 page

PIC12LF1840T48A

DS41594B-page 42

Preliminary

 2011-2012 Microchip Technology Inc.

CONFIGURATION WORD 1

R/P-1/1

FCMEN

IESO

CLKOUTEN

BOREN1

BOREN0

CPD

bit 13

bit 7

R/P-1/1

MCLRE

PWRTE

WDTE1

WDTE0

FOSC2

FOSC1

FOSC0

bit 6

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘1’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

P = Programmable bit

bit 13

FCMEN: Fail-Safe Clock Monitor Enable bit

1 = Fail-Safe Clock Monitor is enabled

0 = Fail-Safe Clock Monitor is disabled

bit 12

IESO: Internal External Switchover bit

1 = Internal/External Switchover mode is enabled

0 = Internal/External Switchover mode is disabled

bit 11

CLKOUTEN: Clock Out Enable bit

If FOSC Configuration bits are set to LP, XT, HS modes:

This bit is ignored, CLKOUT function is disabled. Oscillator function on the CLKOUT pin.

All other FOSC modes:

1 = CLKOUT function is disabled. I/O function on the CLKOUT pin.

0 = CLKOUT function is enabled on the CLKOUT pin

bit 10-9

BOREN<1:0>: Brown-out Reset Enable bits(1)

11 = BOR enabled

10 = BOR enabled during operation and disabled in Sleep

01 = BOR controlled by SBOREN bit of the BORCON register

00 = BOR disabled

bit 8

CPD: Data Code Protection bit(2)

1 = Data memory code protection is disabled

0 = Data memory code protection is enabled

bit 7

CP: Code Protection bit(3)

1 = Program memory code protection is disabled

0 = Program memory code protection is enabled

bit 6

MCLRE: RA3/MCLR/VPP Pin Function Select bit

If LVP bit = 1:

This bit is ignored.

If LVP bit = 0:

1 =MCLR/VPP pin function is MCLR; Weak pull-up enabled.

0 =MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of

WPUA register.

bit 5

PWRTE: Power-up Timer Enable bit(1)

1 = PWRT disabled

0 = PWRT enabled

bit 4-3

WDTE<1:0>: Watchdog Timer Enable bit

11 = WDT enabled

10 = WDT enabled while running and disabled in Sleep

01 = WDT controlled by the SWDTEN bit in the WDTCON register

00 = WDT disabled

Note 1:

Enabling Brown-out Reset does not automatically enable Power-up Timer.

The entire data EEPROM will be erased when the code protection is turned off during an erase.

The entire program memory will be erased when the code protection is turned off.

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