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WM9712CLGEFL/V датащи(PDF) 69 Page - Wolfson Microelectronics plc

номер детали WM9712CLGEFL/V
подробное описание детали  AC??7 Audio and Touchpanel CODEC
PDF  78 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM9712CLGEFL/V датащи(HTML) 69 Page - Wolfson Microelectronics plc

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Production Data
WM9712L
w
PD, Rev 4.6, November 2011
69
Register 58h
controls several additional functions.
REG
ADDR
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
58h
15:13
COMP2DEL
000 (no delay)
Selects Comparator 2 delay
Battery Alarm
12
JIEN
0
Enables Jack Insert Detection
Analogue Audio Outputs, Jack
Insertion and Auto-Switching
11
FRC
0
Forces Jack Insert Detection
10
SVD
0 (enabled)
Disables VREF for lowest possible power
consumption
Power Management
3:2
DIE REV
Indicates device revision. 00=Rev.A, 01=Rev.B, 10=Rev.C
N/A
1
WAKEEN
0 (no wake-up)
Enables GPIO wake-up
GPIO and Interrupt Control
0
IRQ INV
0 (not inverted)
Inverts the IRQ signal (pin 45)
Register 5Ch
controls several additional functions.
REG
ADDR
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
5Ch
15
AMUTE
0
Read-only bit to indicate DAC auto-muting
Audio DACs, Stereo DACs
14
C1REF
0 (AVDD/2)
Selects Comparator 1 Reference Voltage
Battery Alarm
13:12
C1SRC
00 (OFF)
Selects Comparator 1 Signal Source
11
C2REF
0 (AVDD/2)
Selects Comparator 1 Reference Voltage
10:9
C2SRC
00 (OFF)
Selects Comparator 1 Signal Source
8
DS
0
Selects differential microphone input pins. 0=MIC1
and MIC2, 1=LINEL and LINER
Analogue Inputs,
Microphone Input
7
AMEN
0 (OFF)
Enables DAC Auto-Mute
6:5
VBIAS
00
Selects analogue bias for lowest power, depending
on AVDD supply. 0X=3.3V, 10=2.5V, 11=1.8V
Power Management
4
ADCO
0
Selects source of SPDIF data. 0=from SDATAOUT,
1= from audio ADC
Digital Audio (SPDIF) Output
3
HPF
0
Disables ADC high-pass filter
Audio ADC
2
ENT
0
Enables thermal sensor
Analogue Audio Outputs,
Thermal Sensor
1:0
ASS
00
Selects time slots for stereo ADC data. 00=slots 3
and 4, 01=7/8, 10=6/9, 11=10/11
Audio ADC, ADC Slot
Mapping
Registers 60h and 62h
control the ALC and Noise Gate functions.
REG
ADDR
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
60h
15:12
ALCL
1011 (-12dB)
Controls ALC threshold
Audio ADC,
Automatic
Level Control
11:8
HLD
0000 (0 ms)
Controls ALC hold time
7:4
DCY
0011 (192 ms)
Controls ALC decay time
3:0
ATK
0010 (24 ms)
Controls ALC attack time
62h
15:14
ALCSEL
00 (OFF)
Controls which channel ALC operates on. 00=none,
01=right only, 10=left only, 11=both
13:11
MAXGAIN
111 (+30dB)
Controls upper gain limit for ALC
10:9
ZC TIMEOUT
11 (slowest)
Controls time-out for zero-cross detection
8
ALCZC
0 (OFF)
Enables zero-cross detection for ALC
7
NGAT
0 (OFF)
Enables noise gate function
5
NGG
0 (hold gain)
Selects noise gate type. 0=hold gain, 1=mute
4:0
NGTH
00000 (-76.5dB)
Controls noise gate threshold



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