DAC1282IPW datasheet(4/43 Pages) TI1

4 / 43 page

DAC1282

SBAS490

– DECEMBER 2011

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

Minimum/maximum specifications are at TA = –40°C to +85°C. Typical specifications are at TA = +25°C, AVDD = +2.5 V,

AVSS =

–2.5 V, fCLK = 4.096 MHz, VREF = 5 V, and DVDD = 3.3 V, unless otherwise noted. Refer to Figure 50.

DAC1282

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

PULSE MODE

Output levels

31 steps, approximate 3 dB per step

±0.0195

±2.5

Gain error

±0.1

±0.75

Gain drift

ppm/

°C

Offset

±0.5

±3

Offset drift

µV/°C

Output noise(7)

1.5

µVRMS

Slew rate

µs

Settling time

0.1% final value

µs

DC MODE

Resolution

Bits

Step response

100

µs

Gain = 1/1

1.3

µVRMS

Gain = 1/2

1.4

µVRMS

Gain = 1/4

1.8

µVRMS

DC noise(8)

Gain = 1/8

2.7

µVRMS

Gain = 1/16

4.7

µVRMS

Gain = 1/32

8.5

µVRMS

Gain = 1/64

µVRMS

DIGITAL DATA MODE

Data clock rate

fCLK/16

Ones-density full-scale modulation

+FS and

–FS, respectively

Signal bandwidth

–3 dB

8.2

kHz

REFERENCE VOLTAGE INPUT (VREF)

Reference voltage, VREF = VREF – AVSS

2.4

AVDD + 0.25

Operating

220

Reference input impedance

Power-down

SIGNAL SWITCH

Signal range

AVSS

AVDD

Current

Continuous

±50

Differential on-resistance

VSWIN , VSWOUT = 0 V

2.8

Differential on-resistance flatness

VSWIN, VSWOUT = AVDD to AVSS

0.7

On-resistance match between outputs

VSWIN , VSWOUT = 0 V

0.04

TA = +25°C

±0.1

Off-leakage current(9)

TA = +85°C

±5

Off-isolation(10)

120

DIGITAL INPUT/OUTPUT (DVDD = 1.65 V to 3.6 V)

VOH

IOH = 1 mA

0.8

× DVDD

VOL

IOL = 1 mA

0.2

× DVDD

VIH

0.8

× DVDD

DVDD

VIL

DGND

0.2

× DVDD

Input hysteresis

0.5

Input leakage

±10

µA

fCLK

CLK Input

4.096

4.225

MHz

(7)

VOUT = 0 V. Pulse mode output noise is measured by the ADS1282, over a 413-Hz bandwidth using ADC gain = 1.

(8)

VOUT = 0 V. DC noise is measured by the ADS1282, over a 413-Hz bandwidth using complementing gain. DC noise is referred to a

1.77-V full-scale ADC output. Divide output-referred noise by the ADC gain to yield input-referred noise.

(9)

Switch input or output voltage = AVDD

– 0.5 V to AVSS + 0.5 V.

(10) f = 31.25 Hz, 1.77 VRMS. Switch output loaded 2 x 10 kΩ to mid-supply range.

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