DAC1282

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SBAS490

– DECEMBER 2011

SERIAL INTERFACE

Configuration of the DAC is by an SPI-compatible serial interface consisting of four signals: CS, SCLK, DIN, and

DOUT; or the interface can consist of three signals in which case CS may be tied low. Tying CS low permanently

selects the device and DOUT remains a driven output. The interface is used to read and write registers and also

is used to send a DAC reset command.

Serial Communications

DAC1282 communication occurs by clocking register data into the device (on DIN) and reading back register

data (on DOUT). The SCLK input is used to clock data into and out of the device. Data are input on the serial

clock (SCLK) rising edge and output on the SCLK falling edge. The communication protocol is half-duplex (that

is, data are transmitted to and from the device one direction at a time).

Communications to the device occur on 8-bit boundaries. If an unintentional SCLK transition should occur (such

as is possible from a noise spike), the DAC1282 command decoder can be out-of-sync and the serial port may

not respond properly. The serial port may reset in one of the following ways:

1. Take CS high to reset the interface

section)

3. Take RESET/PWDN low then back high to reset the device and the interface

4. Cycle the power supplies for a power-on reset (POR)

Chip Select (CS)

CS (chip select) selects the DAC1282 for communication. To select the device, pull CS low. CS must remain low

for the duration of the command sequence. When CS is taken high, the serial interface is reset, input commands

are ignored, and DOUT enters a high-impedance state.

Serial Clock (SCLK)

The serial clock (SCLK) is a Schmitt-triggered input used to clock data into and out of the DAC1282. SCLK can

be idled high or low. If SCLK is idled low, the SPI timeout feature is active. If SCLK is idled high, the SPI timeout

feature is disabled.

Despite the built-in Schmitt-trigger, keep SCLK as clean as possible to prevent glitches from accidently shifting

the data. Series-terminated printed circuit board (PCB) traces often help to reduce ringing and overshoot (series

termination resistance is approximately 20

is reset. The timeout feature can be used to automatically recover the SPI port in the event of a noise glitch.

Avoid starting new commands after this time interval to prevent an unexpected serial port reset at the next

command instant.

Data Input (DIN)

DIN is the data input pin used to send data to the DAC. The DAC1282 latches DIN input data on the rising edge

of SCLK.

Data Output (DOUT)

DOUT is the data output pin used to read register data out of the DAC. The data are shifted out on the falling

edge of SCLK. DOUT enters a 3-state when CS is high.

SPI TIMEOUT

The DAC has an SPI timeout feature that can be used to recover the SPI port if a possible noise pulse should

occur. The noise pulse may lead to a false SCLK detection that can render the DAC serial port unresponsive.

Holding SCLK high disables the automatic SPI reset.

Copyright

© 2011, Texas Instruments Incorporated

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Product Folder Link(s): DAC1282