DAC1282IPW datasheet(16/43 Pages) TI1

16 / 43 page

DAC1282

SBAS490

– DECEMBER 2011

www.ti.com

Table 2 lists values of registers M and N for selected output frequencies.

Table 2. Register Output Frequencies

SIGNAL FREQUENCY (Hz)(1)

M[3:0] REGISTER BITS

N[7:0] REGISTER BITS

FREQ BIT

0.48828125

0000

1111 1111

0.9765625

0000

1111 1111

1.953125

0000

0111 1111

3.90625

0000

0011 1111

7.8125

0000

0001 1111

15.625

0000

0000 1111

31.25

0000

0000 0111

0000

0000 0100

1010

0011 0001

0101

0001 1000

62.5

0000

0000 0011

100

1001

0001 1000

125

0000

0000 0001

250

0000

0000 0000

(1)

fCLK = 4.096M Hz. The signal frequency scales with fCLK.

When the M or N registers are updated, the sine wave resets to the zero-crossing point. The sine wave can also

be reset to the zero-crossing point by taking the SYNC pin high; see the SYNC section.

The amplitude of the sine-wave output is determined by analog and digital gains. The analog gain increments are

6 dB, from 0 dB to

–36 dB, and are programmed by the GAIN[2:0] register bits. Table 3 lists the analog gains.

Table 3. Analog Gain

ANALOG GAIN

ANALOG GAIN (dB)(1)

DIFFERENTIAL RANGE (V)(2)

GAIN[2:0] REGISTER BITS

1/1

±2.5

000

1/2

–6

±1.25

001

1/4

–12

±0.625

010

1/8

–18

±0.312

011

1/16

–24

±0.156

100

1/32

–30

±0.078

101

1/64

–36

±0.039

110

(1)

Relative to 1.77 VRMS full-scale.

(2)

VREF = 5 V, digital gain = 0 dB.

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