HT67F60 datasheet(73/242 Pages) HOLTEK

73 / 242 page

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM

Rev. 1.50

March 06 , 2012

Rev. 1.50

March 06 , 2012

● Low Voltage Reset — LVR

The contains a low voltage reset circuit in order to monitor the supply voltage of the device,

which is selected via a configuration option. If the supply voltage of the device drops to within a

range of 0.9V~VLVR such as might occur when changing the battery, the LVR will automatically

reset the device internally. The LVR includes the following specifications: For a valid LVR signal,

a low voltage, i.e., a voltage in the range between 0.9V~VLVR must exist for greater than the value

tLVR specified in the A.C. characteristics. If the low voltage state does not exceed tLVR, the LVR will

ignore it and will not perform a reset function. One of a range of specified voltage values for VLVR

can be selected using configuration options.

LV R

In te r nal R es et

t RS TD + t SST

Low Voltage Reset Timing Chart

Note: tRSTD is power-on delay, typical time=100ms

● Watchdog Time-out Reset during Normal Operation

The Watchdog time-out Reset during normal operation is the same as a hardware RES pin reset

except that the Watchdog time-out flag TO will be set to "1".

t RS TD + t SST

WD T Ti me - out

In te r nal R es et

WDT Time-out Reset during Normal Operation Timing Chart

Note: tRSTD is power-on delay, typical time=100ms

● Watchdog Time-out Reset during SLEEP or IDLE Mode

The Watchdog time-out Reset during SLEEP or IDLE Mode is a little different from other kinds

of reset. Most of the conditions remain unchanged except that the Program Counter and the Stack

Pointer will be cleared to "0" and the TO flag will be set to "1". Refer to the A.C. Characteristics

for tSST details.

t SST

WD T Ti me - out

In te r nal R es et

WDT Time-out Reset during SLEEP or IDLE Timing Chart

Note: The tSST is 15~16 clock cycles if the system clock source is provided by ERC or

HIRC. The tSST is 1024 clock for HXT or LXT. The tSST is 1~2 clock for LIRC.

HT67F60 датащи(PDF) 73 Page - Holtek Semiconductor Inc