HT67F60 datasheet(67/242 Pages) HOLTEK

67 / 242 page

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM

Rev. 1.50

March 06 , 2012

Rev. 1.50

March 06 , 2012

Entering the IDLE0 Mode

There is only one way for the device to enter the IDLE0 Mode and that is to execute the "HALT"

instruction in the application program with the IDLEN bit in SMOD register equal to "1" and the

FSYSON bit in WDTC register equal to "0". When this instruction is executed under the conditions

described above, the following will occur:

● The system clock will be stopped and the application program will stop at the "HALT" instruction,

but the Time Base clock and fSUB clock will be on.

● The Data Memory contents and registers will maintain their present condition.

● The WDT will be cleared and resume counting if the WDT clock source is selected to come from

the fSUB clock and the WDT is enabled. The WDT will stop if its clock source originates from the

system clock.

● The I/O ports will maintain their present conditions.

● In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,

will be cleared.

Entering the IDLE1 Mode

There is only one way for the device to enter the IDLE1 Mode and that is to execute the "HALT"

instruction in the application program with the IDLEN bit in SMOD register equal to "1" and the

FSYSON bit in WDTC register equal to "1". When this instruction is executed under the with

conditions described above, the following will occur:

● The system clock and Time Base clock and fSUB clock will be on and the application program will

stop at the "HALT" instruction.

● The Data Memory contents and registers will maintain their present condition.

● The WDT will be cleared and resume counting if the WDT is enabled regardless of the WDT

clock source which originates from the fSUB clock or from the system clock.

● The I/O ports will maintain their present conditions.

● In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,

will be cleared.

Standby Current Considerations

As the main reason for entering the SLEEP or IDLE Mode is to keep the current consumption of the

device to as low a value as possible, perhaps only in the order of several micro-amps except in the

IDLE1 Mode, there are other considerations which must also be taken into account by the circuit

designer if the power consumption is to be minimised. Special attention must be made to the I/O

pins on the device. All high-impedance input pins must be connected to either a fixed high or low

level as any floating input pins could create internal oscillations and result in increased current

consumption. This also applies to devices which have different package types, as there may be

unbonbed pins. These must either be setup as outputs or if setup as inputs must have pull-high

resistors connected.

Care must also be taken with the loads, which are connected to I/O pins, which are setup as outputs.

These should be placed in a condition in which minimum current is drawn or connected only to

external circuits that do not draw current, such as other CMOS inputs. Also note that additional

standby current will also be required if the configuration options have enabled the LXT or LIRC

oscillator.

In the IDLE1 Mode the system oscillator is on, if the system oscillator is from the high speed system

oscillator, the additional standby current will also be perhaps in the order of several hundred micro-amps.

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