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MPC5602DPB датащи(PDF) 15 Page - Freescale Semiconductor, Inc |
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MPC5602DPB датащи(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 27 page ![]() Device family overview MPC5602D Microcontroller Product Brief, Rev. 3.1 Preliminary—Subject to Change Without Notice Freescale Semiconductor 15 3.5.7 Boot Assist Module (BAM) The device implements a Boot Assist Module (BAM): • Block of read-only memory containing VLE code which is executed according to boot mode of the device • Download of code into internal SRAM possible via FlexCAN or LINFlex, after which code can be executed 3.5.8 Enhanced Modular Input Output System (eMIOS) The MPC5602D implements a scaled-down version of the eMIOS module: • Up to 28 timed I/O channels with 16-bit counter resolution • Buffered updates • Support for shifted PWM outputs to minimize occurrence of concurrent edges • Supports configurable trigger outputs for ADC conversion for synchronization to channel output waveforms • Edge-aligned output pulse width modulation — Programmable pulse period and duty cycle — Supports 0% and 100% duty cycle — Shared or independent time bases • DMA transfer support available Table 7 shows the supported eMIOS modes. Table 7. Supported eMIOS Channel Modes Mode Channel type Description Name Counter / OPWM / ICOC O(I)PWM / OPWFMB / OPWMCB / ICOC O(I)PWM / ICOC OPWM / ICOC Double action output compare DAOC x x x — General purpose input / output GPIO x x x x Input filter IPF x x x x Input period measurement IPM x x x — Input pulse width measurement IPWM x x x — Modulus counter MC x — — — Modulus counter buffered (up / down) MCB x x — — Output pulse width and frequency modulation buffered OPWFMB x x — — Output pulse width modulation buffered OPWMB — x x x Center aligned output PWM buffered with dead time OPWMCB — x — — |
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