MPC5602D Microcontroller Product Brief, Rev. 3.1

Preliminary—Subject to Change Without Notice

Device family overview

Freescale Semiconductor

14

3.5.5

Flash memory

The on-chip flash memory on the MPC5602D features the following:

•

Up to 256 Kbyte Code Flash

—2

 16 KB, 3  32 KB and 1  128 KB sectors

— Typical flash-memory access time: 0 wait-state for buffer hits, 2 wait-states for page buffer

miss at 48 MHz

— Page buffers can be allocated for code-only, fixed partitions of code and data, all available for

any access

— 64-bit ECC with single-bit correction, double-bit detection for data integrity

•

Censorship protection scheme to prevent flash-memory content visibility

•

Separate dedicated Data Flash for EEPROM emulation

— 4 erase sectors each containing 16 KB of memory

— Offers read-while-write functionality from main program space

•

Small block flash-memory arrangement in main array to support features such as boot block,

operating system block

•

Hardware managed flash memory writes, erase and verify sequence

•

Error correction status

— Configurable error-correcting codes (ECC) reporting for SRAM and flash memory

— Supports optional reporting of single-bit errors

— Protected mechanism for reporting of corrected ECC values

— Error address recorded including Access type and Master

— Flash-memory ECC reporting registers mirrored into ECSM address space but data comes

from the flash-memory module

— Flash-memory module can be interrogated to provide ECC bit error location

— Margin read for flash-memory array supported for initial program verification

3.5.6

SRAM

The on-chip SRAM on the MPC5602D features the following:

•

Up to 16 KB general purpose RAM

•

Typical SRAM access time: 0 wait-state for reads and 32-bit writes; 1 wait-state for 8- and 16-bit

writes if back to back with a read to same memory block

•

32-bit ECC with single-bit correction, double-bit detection for data integrity

•

Supports byte (8-bit), half word (16-bit), and word (32-bit) writes for optimal use of memory

•

User transparent ECC encoding and decoding for byte, half word, and word accesses