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MPC5674F датащи(PDF) 36 Page - Freescale Semiconductor, Inc |
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MPC5674F датащи(HTML) 36 Page - Freescale Semiconductor, Inc |
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36 / 132 page ![]() MPC5674F Microcontroller Data Sheet, Rev. 6 Electrical Characteristics Freescale Semiconductor 36 4.7.3 LVDS Pad Specifications LVDS pads are implemented to support the MSC (Microsecond Channel) protocol, which is an enhanced feature of the DSPI module. 4.8 Oscillator and FMPLL Electrical Characteristics Table 17. DSPI LVDS Pad Specification 1, 2 (VDD33 = 3.0 V to 3.6 V, VDDEH = 4.75 V to 5.25 V, TA =TL to TH) 1 These are typical values that are estimated from simulation. 2 These specifications are subject to change per device characterization. Spec Characteristic Symbol Min Typical Max Unit Data Rate 1 Data Frequency fLVDSCLK —40— MHz Driver Specs 2 Differential Output Voltage VOD 150 — 400 mV 3 Common Mode Voltage (LVDS), VOS VOS 1.075 1.2 1.325 V 4 Rise/Fall Time tR or tF —2— ns 5 Delay, Z to Normal (High/Low) tDZ — 500 — ns 6 Differential Skew between Positive and Negative LVDS Pair I tphla –tplhb I or I tplhb –tphla I tSkew —— 0.5 ns Termination 7 Transmission Line (Differential) ZO 95 100 105 ohm Table 18. FMPLL Electrical Specifications1 (VDDSYN = 3.0 V to 3.6 V, VSS =VSSSYN =0 V, TA =TL to TH) Spec Characteristic Symbol Min Max Unit 1 PLL Reference Frequency Range2 (Normal Mode) Crystal Reference (PLLCFG2 = 0b0) Crystal Reference (PLLCFG2 = 0b1) External Reference (PLLCFG2 = 0b0) External Reference(PLLCFG2 = 0b1) fref_crystal fref_crystal fref_ext fref_ext 8 40 8 40 20 403 20 40 MHz 2 PLL Frequency 4 Enhanced Mode fPLL fvco(min) ÷ 64 fmax MHz 3 Loss of Reference Frequency5 fLOR 100 1000 kHz 4 Self Clocked Mode Frequency6 fSCM 416 MHz 5 PLL Lock Time7 tLPLL — <750 μs 6 Duty Cycle of Reference 8, 9 tDC 40 60 % |
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