MPC5674F datasheet(29/132 Pages) FREESCALE

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Electrical Characteristics

MPC5674F Microcontroller Data Sheet, Rev. 6

Freescale Semiconductor

4.6

Power Up/Down Sequencing

There is no power sequencing required among power sources during power up and power down in order to operate within

specification as long as the following two rules are met:

•

When VDDREG is tied to a nominal 3.3V supply, VDD33 and VDDSYN must be both shorted to VDDREG.

•

When VDDREG is tied to a 5V supply, VDD33 and VDDSYN must be tied together and shall be powered by the

internal 3.3V regulator.

The recommended power supply behavior is as follows: Use 25 V/millisecond or slower rise time for all supplies. Power up

each VDDE/VDDEH first and then power up VDD. For power down, drop VDD to 0 V first, and then drop all VDDE/VDDEH

supplies. There is no limit on the fall time for the power supplies.

Although there are no power up/down sequencing requirements to prevent issues like latch-up, excessive current spikes, etc.,

the state of the I/O pins during power up/down varies according to Table 12 and Table 13.

—

SMPS regulator output resistance

Note: Pulup to VDDREG when high, pulldown to

VSSREG when low.

—1525

Ohm

—

SMPS regulator clock frequency (after reset)

1.0

1.5

2.0

MHz

—

SMPS regulator overshoot at start-up2

—1.32

1.4

—

SMPS maximum output current

—

1.0

—

Voltage variation on current step2 (20% to 80% of

maximum current with 4 usec constant time)

——

0.1

1 VRC linear regulator is capable of sourcing a current up to 20 mA and sinking a current up to 500 uA. When using the

recommended ballast transistor the maximum output current provided by the voltage regulator VRC/ballast to the VDD core

voltage is up to 1A.

2 Parameter cannot be tested; this value is based on simulation and characterization.

Table 12. Power Sequence Pin States for MH and AE pads

VDD

VDD33

VDDE

MH Pad

MH+LVDS Pads1

1 MH+LVDS pads are output-only.

AE/up-down Pads

High

Normal operation

—

Low

High

Pin is tri-stated (output buffer,

input buffer, and weak pulls

disabled)

Outputs driven high

Pull-ups enabled,

pull-downs disabled

Low

High

Low

Output low,

pin unpowered

Outputs disabled

Output low,

pin unpowered

Low

High

Pin is tri-stated (output buffer,

input buffer, and weak pulls

disabled)

Outputs disabled

Pull-ups enabled,

pull-downs disabled

Table 11. PMC Electrical Specifications (continued)

Name

Parameter

Min

Typ

Max

Unit

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