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MPC5674F датащи(PDF) 30 Page - Freescale Semiconductor, Inc

номер детали MPC5674F
подробное описание детали  MPC5674F Microcontroller Data Sheet
PDF  132 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5674F датащи(HTML) 30 Page - Freescale Semiconductor, Inc

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MPC5674F Microcontroller Data Sheet, Rev. 6
Electrical Characteristics
Freescale Semiconductor
30
4.6.1
Power-Up
If VDDE/VDDEH is powered up first, then a threshold detector tristates all drivers connected to VDDE/VDDEH. There is no limit
to how long after VDDE/VDDEH powers up before VDD must power up. If there are multiple VDDE/VDDEH supplies, they can
be powered up in any order. For each VDDE/VDDEH supply not powered up, the drivers in that VDDE/VDDEH segment exhibit
the characteristics described in the next paragraph.
If VDD is powered up first, then all pads are loaded through the drain diodes to VDDE/VDDEH. This presents a heavy load that
pulls the pad down to a diode above VSS. Current injected by external devices connected to the pads must meet the current
injection specification. There is no limit to how long after VDD powers up before VDDE/VDDEH must power up.
The rise times on the power supplies are to be no faster than 25 V/millisecond.
4.6.2
Power-Down
If VDD is powered down first, then all drivers are tristated. There is no limit to how long after VDD powers down before
VDDE/VDDEH must power down.
If VDDE/VDDEH is powered down first, then all pads are loaded through the drain diodes to VDDE/VDDEH. This presents a heavy
load that pulls the pad down to a diode above VSS. Current injected by external devices connected to the pads must meet the
current injection specification. There is no limit to how long after VDDE/VDDEH powers down before VDD must power down.
There are no limits on the fall times for the power supplies.
4.6.3
Power Sequencing and POR Dependent on VDDA
During power up or down, VDDA can lag other supplies (of magnitude greater than VDDEH/2) within 1 V to prevent any
forward-biasing of device diodes that causes leakage current and/or POR. If the voltage difference between VDDA and VDDEH
is more than 1 V, the following will result:
Triggers POR (ADC monitors on VDDEH1 segment which powers the RESET pin) if the leakage current path created,
when VDDA is sufficiently low, causes sufficient voltage drop on VDDEH1 node monitored crosses low-voltage detect
level.
•If VDDA is between 0–2 V, powering all the other segments (especially VDDEH1) will not be sufficient to get the part
out of reset.
Each VDDEH will have a leakage current to VDDA of a magnitude of ((VDDEH –VDDA – 1 V(diode drop)/200 KOhms)
up to (VDDEH/2 = VDDA +1V).
Table 13. Power Sequence Pin States for F and FS pads
VDD
VDD33
VDDE
F and FS pads
low
low
high
Outputs drive high
low
high
Outputs Disabled
high
low
low
Outputs Disabled
high
low
high
Outputs drive high
high
high
low
Normal operation - except no drive current
and input buffer output is unknown.1
1 The pad pre-drive circuitry will function normally but since VDDE is unpowered
the outputs will not drive high even though the output pmos can be enabled.
high
high
high
Normal Operation



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