S5000PAL datasheet(23/112 Pages) INTEL

номер детали	S5000PAL

подробное описание детали	Technical Product Specification

PDF	112 Pages

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производитель	INTEL [Intel Corporation]

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Functional Architecture

Intel

® Server Board S5000PAL / S5000XAL TPS

Revision 1.7

Intel order number: D31979-010

Functional Architecture

The architecture and design of the Intel® Server Board S5000PAL / S5000XAL is based on the Intel

5000 Chipset Family. The chipset is designed for systems based on the Dual-Core Intel

® Xeon®

processor 5000 sequence with system bus speeds of 667 MHz, 1066 MHz, and 1333 MHz. The chipset

is made up of two main components: the Memory Controller Hub (MCH) for the host bridge and the ESB-

2 I/O controller hub for the I/O subsystem. This chapter provides a high-level description of the

functionality associated with each chipset component and the architectural blocks that make up this

server board. For more in depth detail of the functionality for each of the chipset components and each of

the functional architecture blocks, see the Intel

S5000 Server Board Family Datasheet.

Figure 9. Server Board Functional Block Diagram

Note:

The diagram above uses the Intel

® 5000P MCH as a general reference designator for both MCH

components supported on this server board.

S5000PAL датащи(PDF) 23 Page - Intel Corporation