TLK6002 datasheet(85/96 Pages) TI

85 / 96 page

TLK6002

www.ti.com

SLLSE34 – MAY 2010

–

If 27-1 PRBS Pattern is desired:

•

Write 3’b101 to 7.10:8 TEST_PATTERN_SEL[2:0]

–

If 223-1 PRBS Pattern is desired:

•

Write 3’b110 to 7.10:8 TEST_PATTERN_SEL[2:0]

•

Final CDR Configuration

–

Wait until either AGC_LOCKED asserted or 250M UI

–

Write 8.9:8 (CDRFMULT[1:0]) = 2’b01

–

Poll 5.13 AGC_LOCKED (1’b1) (per channel)

•

Issue Data path Reset

–

Write 1’b1 to 4.3 DATAPATH_RESET

•

The pattern verification is now in progress.

•

PRBSA_PASS contains a real time output that when low indicates the input PRBS pattern on RXAP/N

contains error.

•

PRBSB_PASS contains a real time output that when low indicates the input PRBS pattern on RXBP/N

contains error.

•

The following steps can be performed if the number of errors needs to be monitored:

–

Read 14.15:0 ERROR_COUNTER[15:0] and discard the value.

–

Read 14.15:0 ERROR_COUNTER[15:0], and verify 16’h0000 is read to confirm error free

operation. (as many times as desired during the duration of the test period)

4.20 PACKAGE DISSIPATION RATINGS

The following tables detail the thermal characteristics of the TLK6002 package.

Table 4-2. Package Thermal Characteristics

JEDEC

CUSTOM TYPICAL

STANDARD BOARD

APPLICATION BOARD

PARAMETER

VALUE

qJA

Theta-JA

24.3

19.2

qJB

Theta-JB

11.6

qJC

Theta-JC

4.5

ΨJT

Psi-JT

4.5

ΨJB

Psi-JB

11.5

11.3

Note: Custom Typical Application Board Characteristics:

•

10 x 15 inches

•

12 layer

–

8 power/ground layers – 95% copper (1oz)

–

4 signal layers – 20% copper (1oz)

ΨJB = (TJ – TB)/(Total Device Power Dissipation)

TJ = Device Junction Temperature

TB = Temperature of PCB 1mm from device edge.

ΨJT = (TJ – TC)/(Total Device Power Dissipation)

TJ = Device Junction Temperature

TC = Hottest temperature on the case of the package

4.21 Device Total Worst Case Power Dissipation

The following table details the worst case total device power dissipation:

ELECTRICAL SPECIFICATIONS

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