ADT7463ARQZ-R7 datasheet(22/52 Pages) ONSEMI

22 / 52 page

REV. C

–22–

ADT7463

Masking Interrupt Sources

Interrupt Mask Registers 1 and 2 are located at Addresses

0x74 and 0x75. These allow individual interrupt sources to be

masked out to prevent SMBALERT interrupts. Note that

masking an interrupt source only prevents the SMBALERT

output from being asserted; the appropriate status bit gets set

as normal.

Interrupt Mask Register 1 (Reg. 0x74)

Bit 7 (OOL) = 1, masks SMBALERT for any alert condition

flagged in Status Register 2.

Bit 6 (R2T) = 1, masks SMBALERT for Remote 2 Temperature.

Bit 5 (LT) = 1, masks SMBALERT for Local Temperature.

Bit 4 (R1T) = 1, masks SMBALERT for Remote 1 Temperature.

Bit 3 (5V) = 1, masks SMBALERT for 5 V channel.

Bit 2 (VCC) = 1, masks SMBALERT for VCC channel.

Bit 1 (VCCP) = 1, masks SMBALERT for VCCP channel.

Bit 0 (2.5V) = 1, masks SMBALERT for 2.5 V channel.

Interrupt Mask Register 2 (Reg. 0x75)

Bit 7 (D2) = 1, masks SMBALERT for Diode 2 errors.

Bit 6 (D1) = 1, masks SMBALERT for Diode 1 errors.

Bit 5 (FAN4) = 1, masks SMBALERT for Fan 4 failure. If the

TACH4 pin is being used as the THERM input, this bit masks

SMBALERT for a THERM event.

Bit 4 (FAN3) = 1, masks SMBALERT for Fan 3.

Bit 3 (FAN2) = 1, masks SMBALERT for Fan 2.

Bit 2 (FAN1) = 1, masks SMBALERT for Fan 1.

Bit 1 (OVT) = 1, masks SMBALERT for overtemperature

(exceeding THERM limits).

Bit 0 (12V/VC) = 1, masks SMBALERT for 12 V channel or

for a VID code change, depending on the function used.

Enabling the SMBALERT Interrupt Output

The SMBALERT interrupt function is disabled by default.

Pin 10 or Pin 22 can be reconfigured as an SMBALERT output

to signal out-of-limit conditions.

CONFIGURING PIN 22 AS SMBALERT OUTPUT

BIT SETTING

Config Reg 3 (Reg. 0x78)

<0> ALERT = 1

CONFIGURING PIN 22 AS SMBALERT OUTPUT

BIT SETTING

Config Reg 4 (Reg. 0x7D)

<0> AL2.5V = 1

To Assign THERM Functionality to a Pin

Pin 14 or Pin 20 can be configured as the THERM pin on the

ADT7463.

To enable the THERM functionality, users must first set the

THERM enable bit. The TH5V bit then determines which pin

the THERM functionality is enabled on (i.e., users cannot enable

THERM on two pins at once).

To configure Pin 20 as the THERM pin:

1. Set the TH5V bit (Bit 1) in the Configuration Register 4

(Address = 0x7D) = 1.

2. Set the THERM Enable Bit (Bit 1) in Configuration

To configure Pin 14 as the THERM pin:

1. Set the TH5V bit (Bit 1) in the Configuration Register 4

(Address = 0x7D) = 0.

2. Set the THERM Enable Bit (Bit 1) in Configuration

THERM as an Input

When configured as an input, the user can time assertions on

the THERM pin. This can be useful for connecting to the

PROCHOT output of a CPU to gauge system performance.

See this data sheet for more information on timing THERM

assertions and generating ALERTs based on THERM.

The user can also setup the ADT7463 so when the THERM pin

is driven low externally the fans run at 100%. The fans run at

100% for the duration of the THERM pin being pulled low.

This is done by setting the BOOST bit (Bit 2) in Configuration

already running, for example, in manual mode when the

current duty cycle is above 0x00 or in automatic mode when

the temperature is above TMIN. If the temperature is below

TMIN or if the duty cycle in manual mode is set to 0x00, then

pulling the THERM low externally has no effect. See Figure 25

for more information.

TMIN

THERM

THERM ASSERTED LOW AS AN INPUT

FANS DO NOT GO TO 100% SINCE

TEMPERATURE IS BELOWT MIN

THERM ASSERTED LOW AS AN INPUT

FANS GO TO 100% SINCE TEMPERATURE

IS ABOVE TMIN AND FANS ARE ALREADY

RUNNING

Figure 25. Asserting THERM Low as an Input in

Automatic Fan Speed Control Mode

Rev. 4 | Page 22 of 52 | www.onsemi.com

ADT7463ARQZ-R7 датащи(PDF) 22 Page - ON Semiconductor

ADT7463ARQZ-R7 датащи(HTML) 22 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

датащи скачать

ссылки URL