ADS1258IPHPREP datasheet(27/57 Pages) TI

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CLKIO

Device Ready

WAKE

3.2V, typical

CLKSEL

AVDD

− AVSS(1)

PWDN

NOTE: (1) Shown with DVDD stable.

CLKIO

Device Ready

WAKE

3.2V, typical

AVDD

− AVSS(1)

PWDN,

CLKSEL

NOTE: (1) Shown with DVDD stable.

ADS1258-EP

www.ti.com

SBAS445C – MARCH 2009 – REVISED DECEMBER 2009

Table 7. Wake-Up Times

POWER-UP TIMING

tWAKE

When powering up the device or taking the PWDN

INTERNAL

tWAKE

pin high to wake the device, a wake-up time is

CONDITION

OSCILLATOR(1)

EXTERNAL CLOCK

required before readings can be taken. When using

PWDN or CLKSEL

tOSC

2/fCLK

the internal oscillator, the wake-up time is composed

AVDD – AVSS

tOSC + 2

18/f

CLK

218/fCLK

of the oscillator start-up time and the PLL lock time,

and if the supplies are also being powered, there is a

reset interval time of 218 fCLK cycles. Note that CLKIO

POWER-UP SEQUENCE

is not valid during the wake-up period, as shown in

The analog and digital supplies should be applied

Figure 51.

before any analog or digital input is driven. The power

supplies may be sequenced in any order. The internal

master reset signal is generated from the analog

power supply (AVDD – AVSS), when the level

reaches approximately 3.2 V. The power-up master

reset signal is functionally the same as the Reset

Command and the RESET input pin.

Reset Input (RESET)

When RESET is held low for at least two fCLK cycles,

all registers are reset to their default values and the

digital filter is cleared. When RESET is released high,

the device is ready to convert data.

Clock Select Input (CLKSEL)

This pin selects the source of the system clock: the

crystal oscillator or an external clock. Tie CLKSEL

Figure 51. Device Wake Time with

low to select the crystal oscillator. When using an

Internal Oscillator

external clock (applied to the CLKIO pin), tie CLKSEL

high.

When using the device with an external clock, the

wake-up time is 2/fCLK periods when waking up with

Clock Input/Output (CLKIO)

the PWDN pin and 218/fCLK periods when powering

This pin serves either as a clock output or clock input,

the supplies, all after a valid CLKIO is applied, as

depending on the state of the CLKSEL pin. When

shown in Figure 52.

using an external clock, apply the clock to this pin

and set the CLKSEL pin high. When using the

internal oscillator, this pin has the option of providing

a clock output. The CLKENB bit of register CONFIG0

enables the clock output (default is enabled).

Start Input (START)

The START pin is an input that controls the ADC

process. When the START pin is taken high, the

converter

starts

converting

the

selected

input

channels. When the START pin is taken low, the

conversion in progress runs to completion and the

converter is stopped. The device then enters one of

the two idle modes (see the Idle Modes section for

more details). See the Conversion Control section for

details of using the START pin.

Figure 52. Device Wake Time with External Clock

Table 7 summarizes the wake-up times using the

internal oscillator and the external clock operations.

(1)

Wake-up times for the internal oscillator operation are typical

and may vary depending on crystal characteristics and layout

capacitance. The user should verify the oscillator start-up

times (tOSC = oscillator start-up time).

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