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ADS1258IPHPREP датащи(PDF) 19 Page - Texas Instruments

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номер детали ADS1258IPHPREP
подробное описание детали  16-CHANNEL, 24-BIT ANALOG-TO-DIGITAL CONVERTER
PDF  57 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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ADS1258IPHPREP датащи(HTML) 19 Page - Texas Instruments

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background image
t
SAMPLE
ON
OFF
S
1
S
2
OFF
ON
S
1
S
1
AVSS + 1.3V
R
AIN = ReffB || 2ReffA
AVSS + 1.3V
R
effA = 190kΩ
R
effB = 78kΩ
(f
CLK = 16MHz)
R
effA = 190kΩ
ADCINN
ADCINP
C
A1 = 0.65pF
C
B = 1.6pF
C
A2 = 0.65pF
ADCINN
S
2
AVSS + 1.3V
S
2
AVSS + 1.3V
ADCINP
Equivalent
Circuit
R
eff = tSAMPLE/CX
NOTE: ESD input diodes not shown.
ADS1258-EP
www.ti.com
SBAS445C – MARCH 2009 – REVISED DECEMBER 2009
ADC INPUTS
As with the multiplexer and reference inputs, ESD
diodes protect the ADC inputs. To keep these diodes
The
ADS1258
ADC
inputs
(ADCINP,
ADCINN)
from turning on, make sure the voltages on the input
measure the input signal using internal capacitors
pins do not go below AVSS by more than 100 mV,
that are continuously charged and discharged. The
and likewise do not exceed AVDD by more than 100
left side of Figure 38 shows a simplified schematic of
mV.
the ADC input circuitry; the right side of Figure 38
shows the input circuitry with the capacitors and
switches replaced by an equivalent circuit. Figure 37
shows the ON/OFF timings of the switches shown in
Figure 38. S1 switches close during the input
sampling phase. With S1 closed, CA1 charges to
ADCINP, CA2 charges to ADCINN, and CB charges to
(ADCINP – ADCINN). For the discharge phase, S1
opens first and then S2 closes. CA1 and CA2 discharge
to approximately AVSS + 1.3 V and CB discharges to
0V. This two-phase sample/discharge cycle repeats
with a period of tSAMPLE = 2/fCLK.
Figure 37. S1 and S2 Switch Timing for Figure 38
The charging of the input capacitors draws a transient
current from the source driving the ADS1258 ADC
inputs. The average value of this current can be used
to calculate an effective impedance (Reff) where Reff =
VIN/IAVERAGE. These impedances scale inversely with
fCLK. For example, if fCLK is reduced by a factor of
two, the impedances double.
Figure 38. Simplified ADC Input Structure
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
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Product Folder Link(s): ADS1258-EP



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