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PIC18F23K20-E/ML датащи(PDF) 126 Page - Microchip Technology

номер детали PIC18F23K20-E/ML
подробное описание детали  28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  456 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F23K20-E/ML датащи(HTML) 126 Page - Microchip Technology

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PIC18F2XK20/4XK20
DS41303G-page 126
 2010 Microchip Technology Inc.
TABLE 10-4:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
RB6/KBI2/PGC
RB6
0
O
DIG
LATB<6> data output.
1
I
TTL
PORTB<6> data input; Programmable weak pull-up.
KBI2
1
I
TTL
Interrupt-on-pin change.
PGC
x
I
ST
Serial execution (ICSP) clock input for ICSP and ICD operation.(3)
RB7/KBI3/PGD
RB7
0
O
DIG
LATB<7> data output.
1
I
TTL
PORTB<7> data input; Programmable weak pull-up.
KBI3
1
I
TTL
Interrupt-on-pin change.
PGD
x
O
DIG
Serial execution data output for ICSP and ICD operation.(3)
x
I
ST
Serial execution data input for ICSP and ICD operation.(3)
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
62
LATB
PORTB Data Latch Register (Read and Write to Data Latch)
62
TRISB
PORTB Data Direction Control Register
62
WPUB
WPUB7
WPUB6
WPUB5
WPUB4
WPUB3
WPUB2
WPUB1
WPUB0
62
IOCB
IOCB7
IOCB6
IOCB5
IOCB4
—
—
—
—62
SLRCON
—
—
—
SLRE(1)
SLRD(1)
SLRC
SLRB
SLRA
63
INTCON
GIE/GIEH
PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
59
INTCON2
RBPU
INTEDG0
INTEDG1 INTEDG2
—
TMR0IP
—RBIP
59
INTCON3
INT2IP
INT1IP
—INT2IE
INT1IE
—
INT2IF
INT1IF
59
ANSELH
—
—
—
ANS12
ANS11
ANS10
ANS9
ANS8
62
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTB.
Note 1:
Not implemented on PIC18F2XK20 devices.
TABLE 10-3:
PORTB I/O SUMMARY (CONTINUED)
Pin
Function
TRIS
Setting
I/O
I/O
Type
Description
Legend:
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x
= Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note
1:
Configuration on POR is determined by the PBADEN Configuration bit. Pins are configured as analog inputs by default
when PBADEN is set and digital inputs when PBADEN is cleared.
2:
Alternate assignment for CCP2 when the CCP2MX Configuration bit is ‘0’. Default assignment is RC1.
3:
All other pin functions are disabled when ICSP or ICD are enabled.



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