P89LPC9321 datasheet(57/70 Pages) NXP

57 / 70 page

P89LPC9321_1

Product data sheet

Rev. 01 — 9 December 2008

57 of 70

NXP Semiconductors

P89LPC9321

8-bit microcontroller with accelerated two-clock 80C51 core

[1]

Parameters are valid over operating temperature range unless otherwise speciﬁed.

[2]

Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz.

tSPILEAD

SPI enable lead time

see Figure 25, 26

slave

250

tSPILAG

SPI enable lag time

see Figure 25, 26

slave

250

tSPICLKH

SPICLK HIGH time

see Figure 23, 24, 25, 26

slave

⁄

CCLK

167

master

⁄

CCLK

111

tSPICLKL

SPICLK LOW time

see Figure 23, 24, 25, 26

slave

⁄

CCLK

167

master

⁄

CCLK

111

tSPIDSU

SPI data set-up time

see Figure 23, 24, 25, 26

master or slave

100

tSPIDH

SPI data hold time

see Figure 23, 24, 25, 26

master or slave

100

tSPIA

SPI access time

see Figure 25, 26

slave

tSPIDIS

SPI disable time

see Figure 25, 26

slave

160

tSPIDV

SPI enable to output

data valid time

see Figure 23, 24, 25, 26

slave

160

master

111

tSPIOH

SPI output data hold

time

see Figure 23, 24, 25, 26

tSPIR

SPI rise time

see Figure 23, 24, 25, 26

SPI outputs (SPICLK,

MOSI, MISO)

100

SPI inputs (SPICLK,

MOSI, MISO, SS)

2000

tSPIF

SPI fall time

see Figure 23, 24, 25, 26

SPI outputs (SPICLK,

MOSI, MISO)

100

SPI inputs (SPICLK,

MOSI, MISO, SS)

2000

Table 12.

Dynamic characteristics (18 MHz) …continued

VDD = 3.0 V to 3.6 V unless otherwise speciﬁed.

Tamb = −40 °C to +85 °C for industrial applications, unless otherwise speciﬁed.[1][2]

Symbol

Parameter

Conditions

Variable clock

fosc =18MHz

Unit

Min

Max

Min

Max

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