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P89LPC9321 датащи(PDF) 49 Page - NXP Semiconductors |
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P89LPC9321 датащи(HTML) 49 Page - NXP Semiconductors |
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49 / 70 page ![]() P89LPC9321_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 9 December 2008 49 of 70 NXP Semiconductors P89LPC9321 8-bit microcontroller with accelerated two-clock 80C51 core 7.32 User sector security bytes There are eight User Sector Security Bytes on the P89LPC9321. Each byte corresponds to one sector. Please see the P89LPC9321 User manual for additional details. 7.33 PGA Additional PGA module is integrated. The gain of PGA can be programmable to 2, 4, 8 and 16. Please refer to Table 10 “Static characteristics” for detailed specifications. Register PGACON1 and PGACON1B are used to for PGA1 configuration. Register PGA1TRIM2X4X and PGA1TRIM8X16X provide trim value of PGA1 gain level. As power-on, default trim value for each gain setting is loaded into the PGA1 trim registers. For accurate measurements, offset calibration is required. Please see the P89LPC9321 User manual for detail configuration, calibration, and usage information. In Power-down mode or Total Power-down mode, the PGA1 does not function. If the PGAs, is enabled, it will consume power. Power can be reduced by disabling the PGA1. |
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