поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

10F222 датащи(PDF) 60 Page - Microchip Technology

номер детали 10F222
подробное описание детали  High-Performance Microcontrollers with 8-bit A/D
PDF  86 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

10F222 датащи(HTML) 60 Page - Microchip Technology

Back Button 10F222 Datasheet HTML 56Page - Microchip Technology 10F222 Datasheet HTML 57Page - Microchip Technology 10F222 Datasheet HTML 58Page - Microchip Technology 10F222 Datasheet HTML 59Page - Microchip Technology 10F222 Datasheet HTML 60Page - Microchip Technology 10F222 Datasheet HTML 61Page - Microchip Technology 10F222 Datasheet HTML 62Page - Microchip Technology 10F222 Datasheet HTML 63Page - Microchip Technology 10F222 Datasheet HTML 64Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 60 / 86 page
background image
PIC10F220/222
DS41270E-page 58
© 2007 Microchip Technology Inc.
FIGURE 10-3:
RESET, WATCHDOG TIMER AND DEVICE RESET TIMER TIMING
TABLE 10-3:
RESET, WATCHDOG TIMER AND DEVICE RESET TIMER – PIC10F220/222
AC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature -40
°C ≤ TA ≤ +85°C (industrial)
-40
°C ≤ TA ≤ +125°C (extended)
Operating Voltage VDD range is described in Section 10.1 “DC
Characteristics: PIC10F220/222 (Industrial)”
Param
No.
Sym
Characteristic
Min
Typ(1)
Max
Units
Conditions
30
TMCL
MCLR Pulse Width (low)
2*
5*
μs
μs
VDD = 5V, -40°C to +85°C
VDD = 5.0V
31
TWDT
Watchdog Timer Time-out Period
(no prescaler)
10
10
18
18
29
31
ms
ms
VDD = 5.0V (Industrial)
VDD = 5.0V (Extended)
32
TDRT*
Device Reset Timer Period
(standard)
0.600
0.600
1.125
1.125
1.85
1.95
ms
ms
VDD = 5.0V (Industrial)
VDD = 5.0V (Extended)
34
TIOZ
I/O High-impedance from MCLR
low
——
2*
μs
*
These parameters are characterized but not tested.
Note 1:
Data in the Typical (“Typ”) column is at 5V, 25
°C unless otherwise stated. These parameters are for design
guidance only and are not tested.
VDD
MCLR
Internal
POR
DRT
Timeout(2)
Internal
Reset
Watchdog
Timer
Reset
32
31
34
I/O pin(1)
32
32
34
30
Note
1:
I/O pins must be taken out of High-impedance mode by enabling the output drivers in software.
2:
Runs on POR Reset only.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com