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AS3910

Data Sheet - A p p l i c a t i o n I n f o r m a t i o n

8.18 Active Receive – Use in ISO-14443B Anticollision

Usually the microcontroller does not need information about beginning of the transponder message, it gets an interrupt once reception is finished

or earlier in case the transponder message is longer then the FIFO.

In some cases the information about the fact that the receiver is already processing a message from the transponder is useful. The bit rx_act in

the FIFO Status Register (address 09) provides this information. This bit is set to 1 when start of the transponder message is detected and stays

high until the end of reception.

This information can be used to speed up the ISO-14443B anticollision procedure when more slots are used. In case there is no message in a

certain slot the reader does not have to wait the time message ATQB takes before sending the next Slot-MARKER command, it can send it as

soon as it is clear that there is no answer in that particular slot. The microcontroller can obtain this info by reading the rx_act flag at the time the

receiver should already be processing the ATQB message. In case rx_act flag is set to one the receiver is processing a message and the

microcontroller has to wait for the end of receive interrupt, in opposite case when the rx_act flag is set to zero there is no ATQB message in that

particular slot and the next Slot-MARKER command can be sent immediately.

8.19 ISO-14443B, Reduction of TR0 and TR1 and Suppression of EOF/SOF in PICC Response

The ISO-14443-3 standard, chapter 7.10.3 Coding of Param 1 defines possibility to reduce the TR0 and TR1 and suppress the EOF/SOF in

PICC response.

Note:

The AS3910 Receiver and Framing blocks do not support the reduction of TR0 and TR1 and suppression of EOF/SOF. In case default

settings of these parameters are changed, the framing block will not be able to decode the PICC response.

8.20 Test Pins

Pins TEST and TIO are used to test the AS3910. Pin TEST is a digital pin with pull down, it is used to enter the test mode, pin TIO is used in test

mode as a digital IO, in normal mode it is in tristate. It is recommended to connect pin TEST to VSS and to leave pin TIO open.