AS3910 datasheet(29/47 Pages) AMSCO

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AS3910

Data Sheet - A p p l i c a t i o n I n f o r m a t i o n

Note:

At power up and after direct commands, Set Default and Clear content of this register is set to 0.

Note:

At power up and after direct commands Set Default and Clear content of this register is set to 0.

Note:

Bits frm4 and antcl are cleared after transmission is performed.

Default setting is set at power up and after Set Default command.

fifo_ovr

FIFO overflow

0rx_act

Active receive. This bit is set to 1 when start of

transponder message is detected and stays high until

end of receive.

By reading this bit it can be checked whether transponder is

answering. See also Application Notes (Active receive).

Table 20. Collision Register

Address # 0A: Collision Register (for ISO-14443A only)

type: R

Bit

Name

Function

Comments

7c_byte3

Number of full bytes before the bit collision happened

6c_byte2

5c_byte1

4c_byte0

c_bit2

Number of bits before the collision in the byte where

the collision happened

c_bit1

c_bit0

0rfu

Not used, always 0

Table 21. Number of Transmitted Bytes Register 0

Address # 0B: Number of Transmitted Bytes Register 0

type: RW

Bit

Name

Def.

Function

Comments

7ntx1

Number of bytes to be transmitted in one command,

LSB bits

Maximum supported number of bytes is 1023

6ntx0

5nbtx2

Number of bits in the split byte

000 means that all bytes all full

Applicable only to ISO-14443A bit oriented

anticollision frame in case last byte is split byte

4nbtx1

3nbtx0

Not used

1frm4

4bit response frame

Has to be set to 1 when 4bit response frame is

expected (Mifare Ultralight)

antcl

ISO-14443 anticollision frame

Has to be set to 1 when ISO-14443A bit oriented

anticollision frame is sent

Table 19. FIFO Status Register

Address # 09: FIFO Status Register

type: R

Bit

Name

Function

Comments

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