ST7713 datasheet(32/159 Pages) SITRONIX

32 / 159 page

ST7713

Ver 1.6

2008-05

9.4 Serial interface

The selection of this interface is done by IM2. See the Table 9.4.1.

Table 9.4.1 Selection of serial interface

IM2

4WSPI

Interface

Read back selection

3-line serial interface

Via the read instruction (8-bit, 24-bit and 32-bit read parameter)

4-line serial interface

Via the read instruction (8-bit, 24-bit and 32-bit read parameter)

The serial interface is either 3-lines/9-bits or 4-lines/8-bts bi-directional interface for communication between the micro

controller and the LCD driver. The 3-lines serial interface use: CSX (chip enable), SCL (serial clock) and SDA (serial data

input/output), and the 4-lines serial interface use: CSX (chip enable), D/CX (data/ command flag), SCL (serial clock) and

SDA (serial data input/output). Serial clock (SCL) is used for interface with MCU only, so it can be stopped when no

communication is necessary.

9.4.1 Command Write Mode

The write mode of the interface means the micro controller writes commands and data to the LCD driver. 3-lines serial data

packet contains a control bit D/CX and a transmission byte. In 4-lines serial interface, data packet contains just

transmission byte and control bit D/CX is transferred by the D/CX pin. If D/CX is “low”, the transmission byte is interpreted

as a command byte. If D/CX is “high”, the transmission byte is stored in the display data RAM (memory write command), or

command register as parameter.

Any instruction can be sent in any order to the driver. The MSB is transmitted first. The serial interface is initialized when

CSX is high. In this state, SCL clock pulse or SDA data have no effect. A falling edge on CSX enables the serial interface

and indicates the start of data transmission.

Fig. 9.4.1 Serial interface data stream format

When CSX is “high”, SCL clock is ignored. During the high period of CSX the serial interface is initialized. At the falling edge

of CSX, SCL can be high or low (see Fig 9.4.2). SDA is sampled at the rising edge of SCL. D/CX indicates whether the byte

is command (D/CX=’0’) or parameter/RAM data (D/CX=’1’). D/CX is sampled when first rising edge of SCL (3-lines serial

interface) or 8th rising edge of SCL (4-lines serial interface). If CSX stays low after the last bit of command/data byte, the

serial interface expects the D/CX bit (3-lines serial interface) or D7 (4-lines serial interface) of the next byte at the next rising

edge of SCL.

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