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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT68F20 датащи(PDF) 107 Page - Holtek Semiconductor Inc |
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HT68F20 датащи(HTML) 107 Page - Holtek Semiconductor Inc |
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107 / 210 page  HT68F20/HT68F30/HT68F40/HT68F50/HT68F60 Rev.1.00 107 November 3, 2009 Enhanced Type TM Register Description Overall operation of the Enhanced TM is controlled using a series of registers. A read only register pair exists to store the internal counter 10-bit value, while two read/write register pairs exist to store the internal 10-bit CCRA and CCRB value. The remaining three registers are control registers which setup the different operating and control modes as well as the three CCRP bits. Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 TM1C0 T1PAU T1CK2 T1CK1 T1CK0 T1ON T1RP2 T1RP1 T1RP0 TM1C1 T1AM1 T1AM0 T1AIO1 T1AIO0 T1AOC T1APOL T1CDN T1CCLR TM1C2 T1BM1 T1BM0 T1BIO1 T1BIO0 T1BOC T1BPOL T1PWM1 T1PWM0 TM1DL D7 D6 D5 D4 D3 D2 D1 D0 TM1DH ¾¾¾¾¾¾ D9 D8 TM1AL D7 D6 D5 D4 D3 D2 D1 D0 TM1AH ¾¾¾¾¾¾ D9 D8 TM1BL D7 D6 D5 D4 D3 D2 D1 D0 TM1BH ¾¾¾¾¾¾ D9 D8 10-bit Enhanced TM Register List (if ETM is TM1) · 10-bit Enhanced TM Register List - HT68F30/HT68F40/HT68F50/HT68F60 ¨ TM1C0 Register - 10-bit ETM Bit 76543210 Name T1PAU T1CK2 T1CK1 T1CK0 T1ON T1RP2 T1RP1 T1RP0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 00000000 Bit 7 T1PAU: TM1 Counter Pause Control 0: run 1: pause The counter can be paused by setting this bit high. Clearing the bit to zero restores normal counter operation. When in a Pause condition the TM will remain powered up and continue to consume power. The counter will retain its residual value when this bit changes from low to high and resume counting from this value when the bit changes to a low value again. Bit 6~4 T1CK2~T1CK0: Select TM1 Counter clock 000: fSYS/4 001: fSYS 010: fH/16 011: fH/64 100: fTBC 101: Reserved 110: TCK1 rising edge clock 111: TCK1 falling edge clock These three bits are used to select the clock source for the TM. Selecting the Reserved clock input will effectively disable the internal counter. The external pin clock source can be chosen to be active on the rising or falling edge. The clock source fSYS is the system clock, while fH and fTBC are other internal clocks, the details of which can be found in the oscillator section. Bit 3 T1ON: TM1 Counter On/Off Control 0: Off 1: On This bit controls the overall on/off function of the TM. Setting the bit high enables the counter to run, clearing the bit disables the TM. Clearing this bit to zero will stop the counter from counting and turn off the TM which will reduce its power consumption. When the bit changes state from low to high the internal counter value will be reset to zero, however when the bit changes from high to low, the internal counter will retain its residual value until the bit returns high again. |
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