ATmega169P datasheet(246/393 Pages) ATMEL

246 / 393 page

246

8018N–AVR–08/09

ATmega169P

• Bit 0 – LCDBL: LCD Blanking

When this bit is written to one, the display will be blanked after completion of a frame. All seg-

ment and common pins will be driven to ground.

23.5.2

LCDCRB – LCD Control and Status Register B

• Bit 7 – LCDCS: LCD Clock Select

When this bit is written to zero, the system clock is used. When this bit is written to one, the

external asynchronous clock source is used. The asynchronous clock source is either

Timer/Counter Oscillator or external clock, depending on EXCLK in ASSR. See ”Asynchronous

operation of the Timer/Counter” on page 150 for further details.

• Bit 6 – LCD2B: LCD 1/2 Bias Select

When this bit is written to zero, 1/3 bias is used. When this bit is written to one, ½ bias is used.

Refer to the LCD Manufacture for recommended bias selection.

• Bit 5:4 – LCDMUX1:0: LCD Mux Select

The LCDMUX1:0 bits determine the duty cycle. Common pins that are not used are ordinary port

pins. The different duty selections are shown in Table 23-2.

Note:

1. 1/2 bias when LCD2B is written to one and 1/3 otherwise.

• Bit 3 – Res: Reserved Bit

This bit is reserved and will always read as zero.

• Bits 2:0 – LCDPM2:0: LCD Port Mask

The LCDPM2:0 bits determine the number of port pins to be used as segment drivers. The dif-

ferent selections are shown in Table 23-3. Unused pins can be used as ordinary port pins.

Bit

3210

(0xE5)

LCDCS

LCD2B

LCDMUX1

LCDMUX0

–

LCDPM2

LCDPM1

LCDPM0

LCDCRB

Read/Write

R/W

Initial Value

0000

Table 23-2.

LCD Duty Select

LCDMUX1

LCDMUX0

Duty

Bias

COM Pin

I/O Port Pin

Static

COM0

COM1:3

1/2

1/2 or 1/3(1)

COM0:1

COM2:3

1/3

1/2 or 1/3(1)

COM0:2

COM3

1/4

1/2 or 1/3(1)

COM0:3

None

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