ATmega169P datasheet(154/393 Pages) ATMEL

154 / 393 page

154

8018N–AVR–08/09

ATmega169P

Table 17-4 shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM

mode.

Note:

1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-

pare match is ignored, but the set or clear is done at TOP. See ”Fast PWM Mode” on page 144

for more details.

Table 17-5 shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to phase cor-

rect PWM mode.

Note:

1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-

pare match is ignored, but the set or clear is done at TOP. See ”Phase Correct PWM Mode” on

page 146 for more details.

Table 17-3.

Compare Output Mode, non-PWM Mode

COM2A1

COM2A0

Description

Normal port operation, OC2A disconnected.

Toggle OC2A on compare match.

Clear OC2A on compare match.

Set OC2A on compare match.

Table 17-4.

Compare Output Mode, Fast PWM Mode

(1)

COM2A1

COM2A0

Description

Normal port operation, OC2A disconnected.

Reserved

Clear OC2A on compare match, set OC2A at BOTTOM

(non-inverting mode).

Set OC2A on compare match, clear OC2A at BOTTOM

(inverting mode).

Table 17-5.

Compare Output Mode, Phase Correct PWM Mode(1)

COM2A1

COM2A0

Description

Normal port operation, OC2A disconnected.

Reserved

Clear OC2A on compare match when up-counting. Set OC2A on

compare match when down counting.

Set OC2A on compare match when up-counting. Clear OC2A on

compare match when down counting.

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