AD7944BCPZ datasheet(15/28 Pages) AD

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AD7944

Rev. 0 | Page 15 of 28

ANALOG INPUTS

Figure 24 shows an equivalent circuit of the analog input

structure of the AD7944.

The two diodes, D1 and D2, provide ESD protection for the

analog inputs, IN+ and IN−. Care must be taken to ensure that

the analog input signal does not exceed the reference input

voltage (VREF) by more than 0.3 V. If the analog input signal

exceeds this level, the diodes become forward-biased and start

conducting current. These diodes can handle a forward-biased

current of 130 mA maximum. However, if the supplies of the

input buffer (for example, the V+ and V− supplies of the buffer

amplifier in Figure 23) are different from those of REF, the

analog input signal may eventually exceed the supply rails by

more than 0.3 V. In such a case (for example, an input buffer

with a short circuit), the current limitation can be used to

protect the part.

CPIN

REF

RIN

CIN

IN+ OR IN–

REFGND

Figure 24. Equivalent Analog Input Circuit

The analog input structure allows the sampling of the true

differential signal between IN+ and IN−. By using these

differential inputs, signals common to both inputs are rejected.

During the acquisition phase, the impedance of the analog inputs

(IN+ and IN−) can be modeled as a parallel combination of

Capacitor CPIN and the network formed by the series connection

of RIN and CIN. CPIN is primarily the pin capacitance. RIN is typically

400 Ω and is a lumped component composed of serial resistors

and the on resistance of the switches. CIN is typically 30 pF and

is mainly the ADC sampling capacitor.

During the sampling phase, where the switches are closed, the

input impedance is limited to CPIN. RIN and CIN make a one-pole,

low-pass filter that reduces undesirable aliasing effects and

limits noise.

When the source impedance of the driving circuit is low, the

AD7944 can be driven directly. Large source impedances

significantly affect the ac performance, especially THD. The

dc performances are less sensitive to the input impedance. The

maximum source impedance depends on the amount of THD

that can be tolerated. The THD degrades as a function of the

source impedance and the maximum input frequency.

DRIVER AMPLIFIER CHOICE

Although the AD7944 is easy to drive, the driver amplifier must

meet the following requirements:

•

The noise generated by the driver amplifier must be kept as

low as possible to preserve the SNR and transition noise

performance of the AD7944. The noise from the driver is

filtered by the AD7944 analog input circuit’s one-pole, low-

pass filter, made by RIN and CIN, or by the external filter, if

one is used. Because the typical noise of the AD7944 is

225 μV rms, the SNR degradation due to the amplifier is

⎟

⎠

⎞

⎜

⎝

⎛

−

)

(

225

20log

(dB)

LOSS

SNR

where:

f−3 dB is the input bandwidth, in MHz, of the AD7944

(19 MHz) or the cutoff frequency of the input filter, if

one is used.

N is the noise gain of the amplifier (for example, 1 in buffer

configuration).

eN is the equivalent input noise voltage of the op amp, in

nV/√Hz.

•

For ac applications, the driver should have a THD perfor-

mance commensurate with that of the AD7944.

•

For multichannel multiplexed applications, the driver

amplifier and the AD7944 analog input circuit must settle

for a full-scale step onto the capacitor array at a 14-bit level

(0.0061%, 61 ppm). In the data sheet of the driver amplifier,

settling at 0.1% to 0.01% is more commonly specified. This

value can differ significantly from the settling time at a

14-bit level and should be verified prior to driver selection.

Table 8. Recommended Driver Amplifiers

Amplifier

Typical Application

AD8021

Very low noise and high frequency

AD8022

Low noise and high frequency

ADA4899-1

Ultralow noise and high frequency

AD8014

Low power and high frequency

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