AD7944

Rev. 0 | Page 8 of 28

Pin No.

Mnemonic

Type1

Description

19

BVDD

P

Reference Buffer Power. Nominally at 5.0 V. If an external reference buffer is used to achieve the maximum

SNR performance with a 5 V reference, the reference buffer must be powered down by connecting the

REFIN pin to ground. The external reference buffer must be connected to the BVDD pin.

20

REFIN

AI/O

Internal Reference Output/Reference Buffer Input.

When PDREF is low, the internal band gap reference produces a 1.2 V (typical) voltage on this pin,

which needs external decoupling (0.1 μF typical).

When PDREF is high, use an external reference to provide 1.2 V (typical) to this pin.

When PDREF is high and REFIN is low, the on-chip reference buffer and the band gap reference are

powered down. An external reference must be connected to REF and BVDD.

EP

Exposed Pad

EP

The exposed pad is not connected internally. For increased reliability of the solder joints, it is

recommended that the pad be soldered to the system ground plane.