PCA2003_2

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 02 — 21 July 2009

9 of 21

NXP Semiconductors

PCA2003

32 kHz watch circuit with programmable adaptive motor pulse

[1]

Including the highest driving stage, which one has no motor step detection.

[2]

If the maximum duty cycle of 75 % is selected, not all programming combinations are possible since the

second highest level must be smaller than the highest driving level.

[1]

Between positive and negative detection pulses.

Byte D is read to determine which type of the PCA200x family is used in a particular

application.

Output period

7 to 8

00

1 s

01

5 s

10

10 s

11

20 s

Table 7.

Description of word C bits

Bit

Value

Description

1 to 3

000

0.98 ms

001

1.95 ms

010

2.90 ms

011

3.90 ms

100

4.90 ms

101

5.90 ms

110

6.80 ms

111

7.80 ms

4 to 6

000

3.91 ms

001

4.88 ms

010

5.86 ms

011

6.84 ms

100

7.81 ms

101

8.79 ms

110

9.77 ms

111

10.74 ms

Output period

7

0

bit 7 and 8 of word B active

1

30 s, bit 7 and 8 of word B inactive

Factory test bit

8-

-

Table 6.

Bit

Value

Description