SC417 datasheet(27/29 Pages) SEMTECH

27 / 29 page

SC417/SC427

Applications Information (continued)

Connect the control and switcher power sections as

follows.

Route the V

OUT

feedback trace in a quiet layer,

away from noise sources.

BST is a noisy node and should be kept as short

as possible. The high-side DH driver uses the

boost capacitor to provide the DH drive current.

The boost capacitor must be placed near the

device and connected to the BST and LX pins

using shor t, wide traces to minimize

impedance.

Connect the PGND pin on the chip to the V5V

decoupling capacitor and then insert vias

directly to the ground plane.

•

LDO Section

There are three components for the LDO that need to be

optimized for this layout, the two feedback resistors and

the output capacitor. Use the following guidelines to

locate these components.

The feedback resistors should be placed as close

to the FBL pin as possible. This minimizes the

trace length for the FBL pin.

For the feedback divider connection, the top

resistor must connect directly to the LDO output

capacitor. There should be no PCB inductance

between the top of the resistor divider and the

LDO output capacitor.

If VLDO is not used to power the device, then a

minimum 1.0μF capacitor referenced to AGND is

required.

If VLDO is used to power-up the device by con-

necting it to V5V, then the LDO output capacitor

also becomes the decoupling capacitor for the

V5V input. A minimum 0.1μF capacitor refer-

enced to AGND is required along with a

minimum 1.0μF capacitor referenced to PGND

to filter the gate drive pulses. Each capacitor

should be placed near the V5V pin and con-

nected with short, direct traces. Each capacitor

should connect directly to its respective

ground.

•

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