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ML5800DM датащи(PDF) 9 Page - Micro Linear Corporation

номер детали ML5800DM
подробное описание детали  5.8GHz Low-IF 1.5Mbps FSK Transceiver
PDF  25 Pages
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производитель  MICRO-LINEAR [Micro Linear Corporation]
домашняя страница  http://www.microlinear.com
Logo MICRO-LINEAR - Micro Linear Corporation

ML5800DM датащи(HTML) 9 Page - Micro Linear Corporation

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ML5800
DS5800-F-04
FINAL DATASHEET
JULY 2006
9
3
PAON
O (CMOS)
PA Control Output. Enables the off-chip PA at
the correct times in a Transmit slot. Goes high
when transmit RF is present at TXO; goes low
5
μs before transmit RF is removed from TXO.
This output has 5mA drivers suitable for
driving pin diode switches directly. It also has
optional interlock logic to disable the PA when
the PLL is out of lock.
31
VSS
VDD
3
PAON
8
9
FREF
I (Analog)
Input for the 12.288MHz or 6.144MHz
reference frequency. This input is used as the
reference frequency for the PLL and as a
calibration frequency for the on-chip filters. An
AC-coupled sine or square wave source drives
this self-biased input. The reference source
must be accurate to 20 PPM.
9
VSS
FREF
VCCA
24
8
40k
40k
11
QPO
O (Analog)
Charge Pump Output of the phase detector.
This is connected to the external PLL loop
filter.
10
VSS
VCCPLL
11 QPO
8
15
VTUNE
I (Analog)
VCO Tuning Voltage input from the PLL loop
filter. This pin is very sensitive to noise
coupling and leakage currents.
13
VSS
VCCB
3.7k
15
VTUNE
8
2.5V



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