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SPC5702BECLU датащи(PDF) 37 Page - Freescale Semiconductor, Inc |
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SPC5702BECLU датащи(HTML) 37 Page - Freescale Semiconductor, Inc |
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37 / 98 page ![]() Pinout and Signal Descriptions MPC560xS Microcontroller Data Sheet Data Sheet, Rev. 1 Preliminary—Subject to Change Without Notice Freescale Semiconductor 37 TCK JTAG Debug port serial clock as per JTAG specifications. TDI JTAG Debug port serial data input port as per JTAG standards specifications. TDO JTAG Debug port serial data output port as per JTAG standards specifications. TMS JTAG Debug port Test Mode Select signal for the JTAG TAP controller state machine and indicates various state transitions for the TAP controller in the device. BP[0:3] LCD Back plane signals from the LCD controlling the back plane reference voltage for the LCD display. FP[0:39] LCD Front plane signals for LCD segments. EVTI Nexus Nexus2+ event input trigger. EVTO Nexus Nexus2+ event output trigger. MCKO Nexus Output clock for the development tool MDO[0:3] Nexus Message output port pins that send information bits to the development tools for messages such as Branch Trace Message (BTM), Ownership Trace Message (OTM), Data Trace Message (DTM). Only available in reduced port mode. MSEO Nexus Output pin. Indicates the start or end of the variable length message on the MDO pins. PDI[0:17] Parallel Display Interface Video/graphic data in various RGB modes input to the DCU. PDI_DE Parallel Display Interface Input signal indicates the validity of pixel data on the Input PDI data bus. For valid Pixel Data this is high, otherwise low. PDI_HSYNC Parallel Display Interface Input indicates the timing reference for the start of each frame line for the PDI Input data. PDI_PCLK Parallel Display Interface Output pixel clock for PDI. PDI_VSYNC Parallel Display Interface Input indicates the timing reference for the start of a frame for the PDI input data. RXD_A LINFlex-UART SCI/LIN Receive data signal. This port is used to download the code for the BAM boot sequence RXD_B LINFlex-UART SCI/LIN Receive data signal. Input pad for the LIN SCI module. Connects to the internal LIN second port. TXD_A LINFlex-UART This port is used to download the code for the BAM boot sequence TXD_B LINFlex-UART SCI/LIN Transmit data signal. Transmit (output) port for the second LIN module in the chip . SOUND Sound generation logic (SGL) Sound signal to the speaker/buzzer. Table 7. Signal Details (continued) Signal Peripheral Description |
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