Software Reset

1

SCLK

CS

8

1

S

0

0

X

X

X

1

1

SDI

ControlBits

S

ControlBits

8

t

D(RESET)

t

SU(SCLKF-CSR)

t

SU(CSF-SCLK1R)

SER/

DFR

PD1 PD0

SureSet

0

1

0

0

0

0

0

1

SPILockup

24-BitSureSetSequence

CS

SCLK

SDI

1

0

0

1

Reset NormalOperation

TSC2008

The TSC2008 has a software reset command that can be issued by submitting the 8-bit command '1010 0001'

via the SPI, as shown in Figure 36. This command resets the device to the default configuration. All the settings

in the control byte are reset to default values (see Table 2 and Table 3).

Figure 36. Software Reset Timing

Table 9. Timing Requirements for Figure 36

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

1.2V

≤ VDD < 1.6V

22

ns

Enable lead time

1.6

≤ VDD < 3.6V

14

ns

1.2V

≤ VDD < 1.6V

50

ns

Enable lag time

1.6

≤ VDD < 3.6V

20

ns

Reset period requirement

200

ns

The TSC2008 uses SureSet, a unique reset function. SureSet works in the same way as a hardware reset

except that it does not require a dedicated reset pin on the device. SureSet works independently from the

software reset and power-on reset. For example, the software reset works only after the interface (internal state

machine) is fully functional, whereas SureSet works without the interface. In the unlikely event that the host

becomes out-of-sync with the TSC2008, and forcing CS high does not reset the state machine, the host can

submit a 24-bit sequence (0x06D926) that resets the device to a default state (the same as the power-up state),

as shown in Figure 37. In order to reset the TSC2008, the device must be selected (CS low) before submitting

this sequence.

Figure 37. SureSet Timing

30

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