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7630 датащи(PDF) 59 Page - Renesas Technology Corp |
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7630 датащи(HTML) 59 Page - Renesas Technology Corp |
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59 / 238 page ![]() 1-43 7630 Group User’s Manual +$5':$5( CLOCK GENERATING CIRCUIT The 7630 group is equipped with an internal clock generating circuit. Please refer to Fig. 48 for a circuit example using a ceramic resona- tor or quartz crystal oscillator. For the capacitor values, refer to the manufacturers recommended parameters which depend on each oscillators characteristics. When using an external clock, input it to the XIN pin and leave XOUT open. Fig. 48 Ceramic resonator circuit . Oscillation Control The 7630 group has two low power modes: the stop and the wait mode. Stop mode The microcomputer enters the stop mode by executing the STP instruction. The oscillator stops with the internal clock φ at “H” level. Timers 1 and 2 will be cascaded and initialized by their reload latches contents. The count source for timer 1 will be set to f(XIN)/16. Oscillation is restarted if an external interrupt is accepted or at reset. When using an external interrupt, the internal clock φ remains at “H” level until timer 2 underflows allowing a time-out until the clock oscil- lation becomes stable. When using reset, a fixed time-out will be gen- erated allowing oscillation to stabilize. Wait mode The microcomputer enters the wait mode by executing the WIT instruction. The internal clock ø stops at “H” level while the oscillator keeps running. Recovery from wait mode can be done in the same way as from stop mode. However, the time-out period mentioned above is not required to return from wait-mode, thus no such time-out mechanism has been implemented. Note: Set the interrupt enable bit of the interrupt source to be used to return from stop or wait mode to “1” before executing STP or WIT instruction. Fig. 49 Block diagram of clock generating circuit CIN COUT XIN XOUT WIT STP XIN XOUT 1/2 1/4 CPUM6 Interrupt request Interrupt disable flag S R Q RESET Delay STP D T Q D T Q R S Q R S Q R S Q STP P2 Internal clock for peripherals Internal clock for CPU Oscillator countdown (timer 1 and 2) 2 φ φ “1” “0” CLOCK GENERATING CIRCUIT |
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