7630 datasheet(39/238 Pages) RENESAS

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7630 Group User’s Manual

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Fig. 20 Structure of Timer X mode register

Timer Y

Timer Y is a 16 bit timer with a 16-bit reload latch supporting the fol-

lowing operating modes:

(1) Timer mode

(3) Event counter mode

(5) Pulse period measurement mode

(6) H/L pulse width measurement mode

These modes can be selected by the timer Y mode register (TYM). In

the timer, pulse period- and pulse width measurement modes’ the

timer’s count source can be selected by the timer Y count source

selection bits. Please refer to Fig. 21.

On read or write access to timer Y, note that the high-order and low-

order bytes must be accessed in a specific order.

Write method

When writing to timer Y, write the low-order byte first. The data written

is stored in a temporary register which is assigned to the same

address as TYL. Next, write the high-order byte. When this is fin-

ished, the data is placed in the timer Y high-order reload latch and

the low-order byte is transferred from its temporary register to the

timer Y low-order reload latch.

Read method

When reading the timer Y, read the high-order byte first. This causes

the timer Y high- and low-order bytes to be transferred to temporary

registers being assigned to the same addresses as TYH and TYL.

Next, read the low-order byte which is read from the temporary regis-

ter. This method assures the correct timer value can be read during

timer count operation.

Timer Y count stop control

Regardless of the actual operating mode, timer Y can be stopped by

setting the timer Y count stop bit (bit 7 of the timer Y mode register) to

“1”.

Timer X data write control bit

0 : Data is written to latch and timer

1 : Data is written to latch only

Not used (“0” when read, do not write “1”)

Timer X mode bits

b5 b4

0 : Timer mode

1 : Bi-phase counter mode

0 : Event counter mode

1 : Pulse width measurement mode

CNTR0 polarity selection bit

0 : For event counter mode, rising edge active

For interrupt request, falling edge active

For pulse width measurement mode, measure “H” period

1 : For event counter mode, falling edge active

For interrupt request, rising edge active

For pulse width measurement mode, measure “L” period

Timer X stop control bit

0 : Timer counting

1 : Timer stopped

Timer X mode register (address 001E16)

TXM

TIMERS

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