7630 datasheet(49/238 Pages) RENESAS

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1-33

7630 Group User’s Manual

+$5':$5(

CAN MODULE

The CAN (Controller Area Network) interface of the 7630 group com-

plies with the 2.0B specification, enabling reception and transmission

of frames with either 11- or 29- bit identifier length. Refer to Fig. 33 for

a block diagram of the CAN interface.

The programmer’s interface to the CAN module is formed by three

status/control registers (Fig. 34, Fig. 35, Fig. 36), two bus timing con-

trol registers (Fig. 37 Fig. 38), several registers for acceptance filter-

ing (Fig. 39), the transmit and receive buffer registers (Fig. 40) and

one dominant level control bit (Fig. 24).

Baud Rate Selection

A programmable clock prescaler is used to derive the CAN module’s

basic clock from the internal system clock frequency (

φ). Bit 0 to bit 3

of the CAN bus timing control register represent the prescaler allow-

ing a division ratio from 1 to 1/16 to be selected. So the CAN module

basic clock frequency fCANB can be calculated as follows:

where

p is the value of the prescaler (selectable from 1 to 15). The

effective baud rate of the CAN bus communication depends on the

CAN bus timing control parameters and will be explained below.

CAN Bus Timing Control

Each bit-time consists of four different segments (see Fig. 32):

•

Synchronization segment (SS),

•

Propagation time segment (PTS),

•

Phase buffer segment 1 (PBS1) and

•

Phase buffer segment 2 (PBS2).

Fig. 32 Bit time of CAN module

The first of these segments is of fixed length (one Time Quantum)

and the latter three can be programmed to be 1 to 8 Time Quanta by

the CAN bus timing control register 1 and 2 (see Fig. 37 and Fig. 38).

The whole bit-time has to consist of minimum 8 and maximum 25

Time Quanta. The duration of one Time Quantum is the cycle time of

fCANB. For example, assuming φ = 5 MHz, p = 0, one Time Quantum

will be 200 ns long. This allows the maximum transmission rate of

625 kb/s to be reached (assuming 8 Time Quanta per bit-time).

Fig. 33 Block diagram of CAN module

CANB

------------

PTS

PBS1

PBS2

Sample point

Bit-time

Bus timing control

Data bus

Acceptance mask

Acceptance code

Transmit buffer

Receive buffer 1

Receive buffer 2

Acceptance filter

Data bus

P31/CTX

P32/CRX

Protocol controller

CAN wake-up

Wake-up logic

Polarity control

CAN status/control

registers

CAN MODULE

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