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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H8S2245 датащи(PDF) 238 Page - Renesas Technology Corp |
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H8S2245 датащи(HTML) 238 Page - Renesas Technology Corp |
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238 / 818 page  Section 7 Data Transfer Controller Rev.3.00 Mar. 26, 2007 Page 196 of 772 REJ09B0355-0300 7.3.6 Repeat Mode In repeat mode, one operation transfers one byte or one word of data. From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the initial states of the transfer counter and the address register specified as the repeat area are restored, and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and therefore CPU interrupts cannot be requested when DISEL = 0. Table 7.6 lists the register information in repeat mode and figure 7.7 shows memory mapping in repeat mode. Table 7.6 Register Information in Repeat Mode Name Abbreviation Function DTC source address register SAR Designates source address DTC destination address register DAR Designates destination address DTC transfer count register AH CRAH Holds number of transfers DTC transfer count register AL CRAL Designates transfer count DTC transfer count register B CRB Not used Transfer SAR or DAR DAR or SAR Figure 7.7 Memory Mapping in Repeat Mode |
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