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H8S2245 датащи(PDF) 84 Page - Renesas Technology Corp

номер детали H8S2245
подробное описание детали  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S2245 датащи(HTML) 84 Page - Renesas Technology Corp

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Section 2 CPU
Rev.3.00 Mar. 26, 2007 Page 42 of 772
REJ09B0355-0300
Instruction
Size*
1
Function
EXTU
W/L
Rd (zero extension)
→ Rd
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by padding with zeros on the
left.
EXTS
W/L
Rd (sign extension)
→ Rd
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by extending the sign bit.
TAS*
2
B@ERd – 0, 1
→ (<bit 7> of @Erd)
Tests memory contents, and sets the most significant bit (bit 7) to 1.
Notes: 1. Size refers to the operand size.
B:
Byte
W: Word
L:
Longword
2. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.



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