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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H8S2245 датащи(PDF) 55 Page - Renesas Technology Corp |
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H8S2245 датащи(HTML) 55 Page - Renesas Technology Corp |
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55 / 818 page  Section 1 Overview Rev.3.00 Mar. 26, 2007 Page 13 of 772 REJ09B0355-0300 Pin No. Type Symbol FP-100B, TFP-100B I/O Name and Function Operating mode control MD 2 to MD 0 61, 58, 57 Input Mode pins: These pins set the operating mode. The relation between the settings of pins MD 2 to MD0 and the operating mode is shown below. These pins should not be changed while the H8S/2245 Group is operating. Except for mode changing, be sure to fix the levels of the mode pins (MD 2 to MD 0) by pulling them down or pulling them up until the power turns off. MD 2 MD 1 MD 0 Operating Mode 000 — 1 Mode 1 1 0 Mode 2* 1 Mode 3* 100Mode 4 1 Mode 5 1 0 Mode 6* 1 Mode 7* Note: * Cannot be used in the H8S/2240. System control RES 62 Input Reset input: When this pin is driven low, the chip is reset. The type of reset can be selected according to the NMI input level. At power-on, the NMI pin input level should be set high. STBY 64 Input Standby: When this pin is driven low, a transition is made to hardware standby mode. BREQ 76 Input Bus request: Used by an external bus master to issue a bus request to the H8S/2245 Group. BREQO 74 Output Bus request output: The external bus request signal used when an internal bus master accesses external space in the external bus-released state. |
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